From: Peter Zijlstra <peterz@infradead.org>
To: Matt Fleming <matt@codeblueprint.co.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>,
LKML <linux-kernel@vger.kernel.org>,
Vikas Shivappa <vikas.shivappa@linux.intel.com>,
x86@kernel.org, Matt Fleming <matt.fleming@intel.com>,
Will Auld <will.auld@intel.com>,
Kanaka Juvva <kanaka.d.juvva@intel.com>
Subject: Re: [patch 3/6] x86, perf, cqm: Remove pointless spinlock from state cache
Date: Tue, 19 May 2015 12:51:21 +0200 [thread overview]
Message-ID: <20150519105121.GG19282@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <20150519091318.GB17401@codeblueprint.co.uk>
On Tue, May 19, 2015 at 10:13:18AM +0100, Matt Fleming wrote:
> On Tue, 19 May, at 12:00:53AM, Thomas Gleixner wrote:
> > struct intel_cqm_state is a strict per cpu cache of the rmid and the
> > usage counter. It can never be modified from a remote cpu.
> >
> > The 3 functions which modify the content: start, stop and del (del
> > maps to stop) are called from the perf core with interrupts disabled
> > which is enough protection for the per cpu state values.
> >
> > Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
> > ---
> > arch/x86/kernel/cpu/perf_event_intel_cqm.c | 17 ++++++-----------
> > 1 file changed, 6 insertions(+), 11 deletions(-)
>
> The state locking code was taken from Peter's original patch last year,
> so it would be good for him to chime in that this is safe. It's probably
> just that it was necessary in Peter's patches but after I refactored
> bits I forgot to rip it out.
>
> But yeah, from reading the code again the lock does look entirely
> superfluous.
I think that all stems from a point in time when it wasn't at all clear
to me what the hardware looked like, but what do I know, I can't even
remember last week.
All the patches looked good to me, so I already queued them.
I'll add your Ack on them.
next prev parent reply other threads:[~2015-05-19 10:51 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-19 0:00 [patch 0/6] x86, perf, cqm: Cleanups and preparation for RDT/CAT Thomas Gleixner
2015-05-19 0:00 ` [patch 1/6] x86, perf, cqm: Document PQR MSR abuse Thomas Gleixner
2015-05-19 11:53 ` Matt Fleming
2015-05-27 10:02 ` [tip:perf/core] perf/x86/intel/cqm: " tip-bot for Thomas Gleixner
2015-05-19 0:00 ` [patch 2/6] x86, perf, cqm: Use proper data type Thomas Gleixner
2015-05-19 8:58 ` Matt Fleming
2015-05-19 13:03 ` Thomas Gleixner
2015-05-27 10:03 ` [tip:perf/core] perf/x86/intel/cqm: Use proper data types tip-bot for Thomas Gleixner
2015-05-19 0:00 ` [patch 3/6] x86, perf, cqm: Remove pointless spinlock from state cache Thomas Gleixner
2015-05-19 9:13 ` Matt Fleming
2015-05-19 10:51 ` Peter Zijlstra [this message]
2015-05-27 10:03 ` [tip:perf/core] perf/x86/intel/cqm: " tip-bot for Thomas Gleixner
2015-06-05 18:13 ` [patch 3/6] x86, perf, cqm: " Juvva, Kanaka D
2015-05-19 0:00 ` [patch 4/6] x86, perf, cqm: Avoid pointless msr write Thomas Gleixner
2015-05-19 9:17 ` Matt Fleming
2015-05-27 10:03 ` [tip:perf/core] perf/x86/intel/cqm: Avoid pointless MSR write tip-bot for Thomas Gleixner
2015-05-19 0:00 ` [patch 5/6] x86, perf, cqm: Remove useless wrapper function Thomas Gleixner
2015-05-19 9:18 ` Matt Fleming
2015-05-27 10:04 ` [tip:perf/core] perf/x86/intel/cqm: " tip-bot for Thomas Gleixner
2015-05-19 0:00 ` [patch 6/6] x86, perf, cqm: Add storage for closid and cleanup struct intel_pqr_state Thomas Gleixner
2015-05-19 11:54 ` Matt Fleming
2015-05-19 12:59 ` Thomas Gleixner
2015-05-27 10:04 ` [tip:perf/core] perf/x86/intel/cqm: Add storage for 'closid' and clean up 'struct intel_pqr_state' tip-bot for Thomas Gleixner
2015-05-19 7:42 ` [patch 0/6] x86, perf, cqm: Cleanups and preparation for RDT/CAT Peter Zijlstra
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