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* Re: [EDT][PATCH 1/1] hw_breakpoint.c :cpu hotplug handling
@ 2015-05-18  4:46 Vaneet Narang
  2015-05-20 16:50 ` Will Deacon
  0 siblings, 1 reply; 5+ messages in thread
From: Vaneet Narang @ 2015-05-18  4:46 UTC (permalink / raw)
  To: Will Deacon, Maninder Singh
  Cc: linux@arm.linux.org.uk, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Amit Arora, AJEET YADAV,
	AKHILESH KUMAR

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EP-2DAD0AFA905A4ACB804C4F82A001242F

On Wed, May 13, 2015 at 06:24:06AM +0100, Maninder Singh wrote:
>> EP-2DAD0AFA905A4ACB804C4F82A001242F
>> 
>> Subject: [PATCH 1/1] hw_breakpoint.c :cpu hotplug handling
>> 
>> This patch adds support for CPU hotplug, It re-installl all installed watchpoints and breakpoints
>> back on H/W in case of cpu-hot plug.

>Not sure why this is needed -- the scheduler should reinstall the
>breakpoints when the debugged task gets scheduled in via
>arch_install_hw_breakpoint.
>
>Will

I agree with you this reinstalling has to be either take care by scheduler or Debug tool. 
In current implementation we clear H/W registers but we don't clear slots (wp_on_reg / bp_on_reg) for both watchpoint or breakpoint.
So it makes mandatory for debug tool to uninstall breakpoints when CPU goes offline, because if we don't 
uninstall which I think is not required and when CPU comes online, we will not be able to reinstall them back because there will be no free slots.
Despite of the fact that H/W registers are free but still we wouldn't be able to install breakpoints.
Logically we should clear these slots or we should reinstall but if you think reinstall has to be taken care by scheduler or debugger
then at least we should clear these slots.

Regards,
Vaneet Narang
ÿôèº{.nÇ+‰·Ÿ®‰­†+%ŠËÿ±éݶ\x17¥Šwÿº{.nÇ+‰·¥Š{±þG«éÿŠ{ayº\x1dʇڙë,j\a­¢f£¢·hšïêÿ‘êçz_è®\x03(­éšŽŠÝ¢j"ú\x1a¶^[m§ÿÿ¾\a«þG«éÿ¢¸?™¨è­Ú&£ø§~á¶iO•æ¬z·švØ^\x14\x04\x1a¶^[m§ÿÿÃ\fÿ¶ìÿ¢¸?–I¥

^ permalink raw reply	[flat|nested] 5+ messages in thread
* [EDT][PATCH 1/1] hw_breakpoint.c :cpu hotplug handling
@ 2015-05-13  5:24 Maninder Singh
  2015-05-13  5:33 ` Baruch Siach
  2015-05-13 16:08 ` Will Deacon
  0 siblings, 2 replies; 5+ messages in thread
From: Maninder Singh @ 2015-05-13  5:24 UTC (permalink / raw)
  To: will.deacon, linux, linux-arm-kernel, linux-kernel
  Cc: v.narang@samsung.com, Amit Arora, AJEET YADAV, AKHILESH KUMAR

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EP-2DAD0AFA905A4ACB804C4F82A001242F

Subject: [PATCH 1/1] hw_breakpoint.c :cpu hotplug handling

This patch adds support for CPU hotplug, It re-installl all installed watchpoints and breakpoints
back on H/W in case of cpu-hot plug.

Signed-off-by: Vaneet Narang <v.narang@samsung.com>
Signed-off-by: Maninder Singh <maninder1.s@samsung.com>
Reviewed-by: Amit Arora <amit.arora@samsung.com>
Reviewed-by: Ajeet Yadav <ajeet.y@samsung.com>
---
 arch/arm/kernel/hw_breakpoint.c |   56 +++++++++++++++++++++++++++++++++++++++
 1 files changed, 56 insertions(+), 0 deletions(-)

diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index dc7d0a9..172bfa8 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -388,6 +388,56 @@ int arch_install_hw_breakpoint(struct perf_event *bp)
 	return 0;
 }
 
+/*
+ * reInstall a perf counter breakpoint.
+ */
+void arch_reinstall_hw_breakpoint(int index, int type)
+{
+	struct arch_hw_breakpoint *info;
+	struct perf_event **slots;
+	int ctrl_base, val_base;
+	u32 addr, ctrl;
+	struct perf_event *bp;
+
+	if (type == ARM_ENTRY_BREAKPOINT) {
+		/* Breakpoint */
+		ctrl_base = ARM_BASE_BCR;
+		val_base = ARM_BASE_BVR;
+		slots = (struct perf_event **)__get_cpu_var(bp_on_reg);
+	} else {
+		/* Watchpoint */
+		ctrl_base = ARM_BASE_WCR;
+		val_base = ARM_BASE_WVR;
+		slots = (struct perf_event **)__get_cpu_var(wp_on_reg);
+	}
+
+	bp = slots[index];
+	if (!bp)
+		return;
+
+	info = counter_arch_bp(bp);
+	addr = info->address;
+	ctrl = encode_ctrl_reg(info->ctrl) | 0x1;
+
+
+	/* Override the breakpoint data with the step data. */
+	if (info->step_ctrl.enabled) {
+		addr = info->trigger & ~0x3;
+		ctrl = encode_ctrl_reg(info->step_ctrl);
+		if (info->ctrl.type != ARM_BREAKPOINT_EXECUTE) {
+			index = 0;
+			ctrl_base = ARM_BASE_BCR + core_num_brps;
+			val_base = ARM_BASE_BVR + core_num_brps;
+		}
+	}
+
+	/* Setup the address register. */
+	write_wb_reg(val_base + index, addr);
+
+	/* Setup the control register. */
+	write_wb_reg(ctrl_base + index, ctrl);
+}
+
 void arch_uninstall_hw_breakpoint(struct perf_event *bp)
 {
 	struct arch_hw_breakpoint *info = counter_arch_bp(bp);
@@ -1019,6 +1069,12 @@ clear_vcr:
 out_mdbgen:
 	if (enable_monitor_mode())
 		cpumask_or(&debug_err_mask, &debug_err_mask, cpumask_of(cpu));
+
+	for (i = 0; i < core_num_brps; ++i)
+		arch_reinstall_hw_breakpoint(i, ARM_ENTRY_BREAKPOINT);
+	for (i = 0; i < core_num_wrps; ++i)
+		arch_reinstall_hw_breakpoint(i, ARM_ENTRY_SYNC_WATCHPOINT);
+
 }
 
 static int dbg_reset_notify(struct notifier_block *self,
-- 
1.7.1


Thanks 
Maninder Singhÿôèº{.nÇ+‰·Ÿ®‰­†+%ŠËÿ±éݶ\x17¥Šwÿº{.nÇ+‰·¥Š{±þG«éÿŠ{ayº\x1dʇڙë,j\a­¢f£¢·hšïêÿ‘êçz_è®\x03(­éšŽŠÝ¢j"ú\x1a¶^[m§ÿÿ¾\a«þG«éÿ¢¸?™¨è­Ú&£ø§~á¶iO•æ¬z·švØ^\x14\x04\x1a¶^[m§ÿÿÃ\fÿ¶ìÿ¢¸?–I¥

^ permalink raw reply related	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2015-05-20 16:50 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
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2015-05-18  4:46 [EDT][PATCH 1/1] hw_breakpoint.c :cpu hotplug handling Vaneet Narang
2015-05-20 16:50 ` Will Deacon
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2015-05-13  5:24 Maninder Singh
2015-05-13  5:33 ` Baruch Siach
2015-05-13 16:08 ` Will Deacon

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