From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756016AbbEUOiN (ORCPT ); Thu, 21 May 2015 10:38:13 -0400 Received: from mail-bl2on0121.outbound.protection.outlook.com ([65.55.169.121]:44928 "EHLO na01-bl2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1755984AbbEUOiK (ORCPT ); Thu, 21 May 2015 10:38:10 -0400 Authentication-Results: spf=none (sender IP is 165.204.84.222) smtp.mailfrom=amd.com; intel.com; dkim=none (message not signed) header.d=none; X-WSS-ID: 0NOPFBD-08-1C4-02 X-M-MSG: Date: Thu, 21 May 2015 22:32:17 +0800 From: Huang Rui To: Borislav Petkov CC: Ingo Molnar , Len Brown , "Rafael J. Wysocki" , Thomas Gleixner , "x86@kernel.org" , "linux-kernel@vger.kernel.org" , Fengguang Wu , "Aaron Lu" , "Li, Tony" Subject: Re: [RFC PATCH 2/4] x86, mwaitt: introduce mwaitx idle with a configurable timer Message-ID: <20150521143217.GB22642@hr-slim.amd.com> References: <1432022472-2224-1-git-send-email-ray.huang@amd.com> <1432022472-2224-3-git-send-email-ray.huang@amd.com> <20150519113121.GD4819@pd.tnic> <20150520085520.GA8566@gmail.com> <20150520091213.GA3645@pd.tnic> <20150520102258.GA21245@gmail.com> <20150520105032.GD3645@pd.tnic> <20150520111120.GA25215@gmail.com> <20150520112110.GG3645@pd.tnic> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <20150520112110.GG3645@pd.tnic> User-Agent: Mutt/1.5.21 (2010-09-15) X-EOPAttributedMessage: 0 X-Microsoft-Exchange-Diagnostics: 1;BY2FFO11OLC005;1:sgf8hPi4lg2mXcxuZ9U6e/fmL3+NyFuEGeQxmM5O9vJzITCDKUbz7+8A5OmSy9QTNyLL7F0afh4/YSfQQG/SLloyh7CA3rhXNfAZG58ny/MTh7M16Jw20Qp/rx3on8/phQrEwqOuqbn+oYTTNxSuFJRGJPIDBQJ4ZddYjApNogCeTFgUwZfbPGfiEVy/ciSY0yfgl4LpMH/QvPXXldqW39C4p9nlH2syAdqDTQ9ZxwtNu25sBvNq/B85a7rxtzopKzYSbezIeP05UUKLUdHYgFuheUlHz/Ki3uPi31DtHyztPKltVOvnk5kC3ERhKk3Ohr2GInCyem4PZeFZ5EtAMQ== X-Forefront-Antispam-Report: CIP:165.204.84.222;CTRY:US;IPV:NLI;EFV:NLI;SFV:NSPM;SFS:(10019020)(6009001)(428002)(164054003)(199003)(51704005)(24454002)(189002)(189998001)(50986999)(2950100001)(47776003)(77156002)(19580395003)(53416004)(54356999)(83506001)(64706001)(76176999)(5001860100001)(4001540100001)(23726002)(86362001)(4001350100001)(110136002)(46102003)(97736004)(5001830100001)(50466002)(106466001)(92566002)(33656002)(101416001)(68736005)(87936001)(62966003)(15975445007)(97756001)(93886004)(77096005)(46406003)(105586002)(217873001);DIR:OUT;SFP:1102;SCL:1;SRVR:BN1PR02MB072;H:atltwp02.amd.com;FPR:;SPF:None;PTR:InfoDomainNonexistent;A:1;MX:1;LANG:en; X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:BN1PR02MB072; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(5005006)(3002001);SRVR:BN1PR02MB072;BCL:0;PCL:0;RULEID:;SRVR:BN1PR02MB072; X-Forefront-PRVS: 0583A86C08 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 May 2015 14:38:06.8207 (UTC) X-MS-Exchange-CrossTenant-Id: fde4dada-be84-483f-92cc-e026cbee8e96 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=fde4dada-be84-483f-92cc-e026cbee8e96;Ip=[165.204.84.222];Helo=[atltwp02.amd.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN1PR02MB072 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, May 20, 2015 at 07:21:10PM +0800, Borislav Petkov wrote: > On Wed, May 20, 2015 at 01:11:20PM +0200, Ingo Molnar wrote: > > - MWAITX takes a 'timeout' parameter, but otherwise behaves exactly > > like MWAIT: i.e. once idle it won't exit idle on its own > > Let me quote the commit message: > > "MWAITT, another name is MWAITX (MWAIT with extensions), has a > configurable timer that causes MWAITX to exit on expiration." > > You need to set the second bit in ECX to enable the timer. > > I guess if you don't, then you get normal MWAIT but then you don't need > the timeout either... That's right. This feature will expose on Family 15h, Model 60-6fh. Just check the http://developer.amd.com, sorry, I don't know why APM still doesn't update. But I can raise your question to HW guys. > > > - based on the 'timeout' hint, MWAITX can internally optimize how > > deep sleep it enters. If the timeout is large it goes deep, if > > it's small, it goes shallow. > > I haven't heard anything about handling the timeout this way and if it > is not done this way, maybe Rui could forward this idea to hw people... > Actually, there is another use case on HSA stack. The timer is used for synchronization between CPU and GPU. The CPU core will exit waiting when GPU thread modifies the monitoring address or the timer expires. :) Thanks, Rui