From: Peter Zijlstra <peterz@infradead.org>
To: Stephane Eranian <eranian@google.com>
Cc: Ingo Molnar <mingo@kernel.org>,
Vince Weaver <vincent.weaver@maine.edu>,
Jiri Olsa <jolsa@redhat.com>, LKML <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 02/10] perf/x86: Improve HT workaround GP counter constraint
Date: Fri, 22 May 2015 15:25:14 +0200 [thread overview]
Message-ID: <20150522132514.GC3644@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <CABPqkBSSCnPYf3sjoL2Ej+a4LcBvR+Gg1VmkSxWCwk4Z7U84tw@mail.gmail.com>
On Fri, May 22, 2015 at 06:05:49AM -0700, Stephane Eranian wrote:
> > I bet you tested the exclusive events earlier :-) Its one of the bugs,
> > the n_excl accounting is leaking up. Once !0 it stays !0.
>
> So you're saying intel_put_excl_constraint() does not do the --n_excl?
No it does, but we call get_events_constraints() every time we do
x86_schedule_events(), and put_events_constraints() only on
x86_pmu_del(). This means we call get() much more than we put().
Therefore leak up.
next prev parent reply other threads:[~2015-05-22 13:25 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-21 11:17 [PATCH 00/10] Various x86 pmu scheduling patches Peter Zijlstra
2015-05-21 11:17 ` [PATCH 01/10] perf,x86: Fix event/group validation Peter Zijlstra
2015-05-21 12:35 ` Stephane Eranian
2015-05-21 12:56 ` Peter Zijlstra
2015-05-21 13:07 ` Stephane Eranian
2015-05-21 13:09 ` Peter Zijlstra
2015-05-21 13:18 ` Stephane Eranian
2015-05-21 13:20 ` Peter Zijlstra
2015-05-21 13:27 ` Stephane Eranian
2015-05-21 13:29 ` Peter Zijlstra
2015-05-21 13:36 ` Stephane Eranian
2015-05-21 14:03 ` Peter Zijlstra
2015-05-21 15:11 ` Stephane Eranian
2015-05-22 6:49 ` Ingo Molnar
2015-05-22 9:26 ` Stephane Eranian
2015-05-22 9:46 ` Ingo Molnar
2015-05-21 14:53 ` Peter Zijlstra
2015-05-21 15:42 ` Stephane Eranian
2015-08-21 20:31 ` Sasha Levin
2015-09-10 4:48 ` Sasha Levin
2015-09-10 8:54 ` Stephane Eranian
2015-09-10 10:01 ` Peter Zijlstra
2015-05-21 11:17 ` [PATCH 02/10] perf/x86: Improve HT workaround GP counter constraint Peter Zijlstra
2015-05-22 10:04 ` Stephane Eranian
2015-05-22 11:21 ` Peter Zijlstra
2015-05-22 11:24 ` Stephane Eranian
2015-05-22 11:28 ` Peter Zijlstra
2015-05-22 12:35 ` Stephane Eranian
2015-05-22 12:53 ` Peter Zijlstra
2015-05-22 12:55 ` Stephane Eranian
2015-05-22 12:59 ` Peter Zijlstra
2015-05-22 13:05 ` Stephane Eranian
2015-05-22 13:07 ` Stephane Eranian
2015-05-22 13:25 ` Peter Zijlstra
2015-05-22 13:29 ` Stephane Eranian
2015-05-22 13:36 ` Peter Zijlstra
2015-05-22 13:40 ` Stephane Eranian
2015-05-22 13:48 ` Peter Zijlstra
2015-05-23 8:26 ` Ingo Molnar
2015-05-22 13:25 ` Peter Zijlstra [this message]
2015-05-22 13:10 ` Peter Zijlstra
2015-05-21 11:17 ` [PATCH 03/10] perf/x86: Correct local vs remote sibling state Peter Zijlstra
2015-05-21 13:31 ` Stephane Eranian
2015-05-21 14:10 ` Peter Zijlstra
2015-05-21 11:17 ` [PATCH 04/10] perf/x86: Use lockdep Peter Zijlstra
2015-05-21 11:17 ` [PATCH 05/10] perf/x86: Simplify dynamic constraint code somewhat Peter Zijlstra
2015-05-21 11:17 ` [PATCH 06/10] perf/x86: Make WARNs consistent Peter Zijlstra
2015-05-21 11:17 ` [PATCH 07/10] perf/x86: Move intel_commit_scheduling() Peter Zijlstra
2015-05-21 11:17 ` [PATCH 08/10] perf/x86: Remove pointless tests Peter Zijlstra
2015-05-21 13:24 ` Stephane Eranian
2015-05-21 11:17 ` [PATCH 09/10] perf/x86: Remove intel_excl_states::init_state Peter Zijlstra
2015-05-21 13:39 ` Stephane Eranian
2015-05-21 14:12 ` Peter Zijlstra
2015-05-21 11:17 ` [PATCH 10/10] perf,x86: Simplify logic Peter Zijlstra
2015-05-21 11:48 ` [PATCH 00/10] Various x86 pmu scheduling patches Stephane Eranian
2015-05-21 12:53 ` Peter Zijlstra
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