Re: [PATCH v2 02/11] perf/x86: Improve HT workaround GP counter constraint

[Peter Zijlstra <peterz@infradead.org>]

On Fri, May 22, 2015 at 03:29:07PM +0200, Peter Zijlstra wrote:
> @@ -696,11 +699,16 @@ static bool __perf_sched_find_counter(st
>  				goto done;
>  		}
>  	}
> +
>  	/* Grab the first unused counter starting with idx */
>  	idx = sched->state.counter;
>  	for_each_set_bit_from(idx, c->idxmsk, INTEL_PMC_IDX_FIXED) {
> +		if (!__test_and_set_bit(idx, sched->state.used)) {
> +			if (sched->state.nr_gp++ >= sched->max_gp)
> +				return false;

Note the placement inside the success path of the GP allocation, instead
of the attempt a GP place we had before.

> +
>  			goto done;
> +		}
>  	}
>  
>  	return false;




> @@ -2000,6 +1999,11 @@ intel_get_excl_constraints(struct cpu_hw
>  	 * across HT threads
>  	 */
>  	is_excl = c->flags & PERF_X86_EVENT_EXCL;
> +	if (is_excl && !(event->hw.flags & PERF_X86_EVENT_EXCL_ACCT)) {
> +		event->hw.flags |= PERF_X86_EVENT_EXCL_ACCT;
> +		if (!cpuc->n_excl++)
> +			WRITE_ONCE(excl_cntrs->has_exclusive[tid], 1);
> +	}
>  
>  	/*
>  	 * xl = state of current HT

And that is what keeps repeated get_event_constraints() calls from ever
increasing our n_excl count.