From: Mathieu Olivari <mathieu@codeaurora.org>
To: Florian Fainelli <f.fainelli@gmail.com>
Cc: Andrew Lunn <andrew@lunn.ch>,
robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com,
ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
davem@davemloft.net, linux@roeck-us.net,
gang.chen.5i5j@gmail.com, jiri@resnulli.us, leitec@staticky.com,
fabf@skynet.be, alexander.h.duyck@intel.com,
pavel.nakonechny@skitlab.ru, joe@perches.com, sfeldma@gmail.com,
nbd@openwrt.org, juhosg@openwrt.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, netdev@vger.kernel.org
Subject: Re: [PATCH 0/7] net: dsa: add QCA AR8xxx switch family support\
Date: Fri, 29 May 2015 12:59:55 -0700 [thread overview]
Message-ID: <20150529195955.GA2884@codeaurora.org> (raw)
In-Reply-To: <5568C4D4.7010701@gmail.com>
On Fri, May 29, 2015 at 12:58:12PM -0700, Florian Fainelli wrote:
> On 29/05/15 11:59, Andrew Lunn wrote:
> > On Fri, May 29, 2015 at 11:49:54AM -0700, Mathieu Olivari wrote:
> >> On Fri, May 29, 2015 at 04:00:01AM +0200, Andrew Lunn wrote:
> >>> FYI:
> >>>
> >>> I have patches which allow DSA to use two cpu interfaces. Seems to
> >>> work on my DIR665 with a Marvell Switch.
> >>>
> >>> I will post the patches as an RFC.
> >>>
> >>> Andrew
> >>
> >> Does it require the switch CPU ports to support LAG or is it generic
> >> enough to allow switch partitioning?
> >
> > When using tags, DSA by default partitions the switch. Each user port
> > is separate from other ports. lan4 will not bridge to lan1 unless you
> > either do it in software, or you implement the
> > .port_join_bridge/.port_leave_bridge/.port_stp_update methods of
> > dsa_switch_driver.
> >
> > What it requires is that for each user port, you can configure what
> > cpu port it should use. Marvell devices have this ability, and at a
> > first look, it seems like SF2 does as well, but i will leave Florian
> > to answer definitively.
>
> That's right, such configuration happens by using VLAN_CTL in the
> context of SF2, by default only Port <N> and CPU can talk to each other.
> Bridging ports involving putting them in the same domain, e.g: updating
> the VLAN_CTL bitmask to include all bridge members.
Similar here. That would work for ar8xxx too.
> --
> Florian
next prev parent reply other threads:[~2015-05-29 20:00 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-29 1:42 [PATCH 0/7] net: dsa: add QCA AR8xxx switch family support Mathieu Olivari
2015-05-29 1:42 ` [PATCH 1/7] net: dsa: add new driver for ar8xxx family Mathieu Olivari
2015-05-29 2:08 ` Andrew Lunn
2015-06-01 8:14 ` Paul Bolle
2015-05-29 1:42 ` [PATCH 2/7] net: dsa: ar8xxx: add ethtool hw statistics support Mathieu Olivari
2015-05-29 1:42 ` [PATCH 3/7] net: dsa: ar8xxx: add regmap support Mathieu Olivari
2015-05-29 1:58 ` Florian Fainelli
2015-05-29 2:23 ` Andrew Lunn
2015-05-29 2:36 ` Florian Fainelli
2015-05-29 2:44 ` Andrew Lunn
2015-05-29 17:36 ` Mathieu Olivari
2015-05-29 17:59 ` Andrew Lunn
2015-05-30 22:38 ` Sergey Ryazanov
2015-05-29 1:42 ` [PATCH 4/7] net: dsa: add QCA tag support Mathieu Olivari
2015-05-29 1:42 ` [PATCH 5/7] net: dsa: ar8xxx: enable QCA header support on AR8xxx Mathieu Olivari
2015-05-29 1:42 ` [PATCH 6/7] net: dsa: ar8xxx: add support for second xMII interfaces through DT Mathieu Olivari
2015-05-29 1:42 ` [PATCH 7/7] Documentation: devicetree: add ar8xxx binding Mathieu Olivari
2015-05-29 2:04 ` Florian Fainelli
2015-05-29 2:00 ` [PATCH 0/7] net: dsa: add QCA AR8xxx switch family support Andrew Lunn
2015-05-29 18:49 ` [PATCH 0/7] net: dsa: add QCA AR8xxx switch family support\ Mathieu Olivari
2015-05-29 18:59 ` Andrew Lunn
2015-05-29 19:58 ` Florian Fainelli
2015-05-29 19:59 ` Mathieu Olivari [this message]
2015-05-29 20:01 ` Andrew Lunn
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