From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752087AbbFAI6e (ORCPT ); Mon, 1 Jun 2015 04:58:34 -0400 Received: from mail-wg0-f51.google.com ([74.125.82.51]:34088 "EHLO mail-wg0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751466AbbFAI60 (ORCPT ); Mon, 1 Jun 2015 04:58:26 -0400 Date: Mon, 1 Jun 2015 10:58:21 +0200 From: Ingo Molnar To: Andy Lutomirski Cc: "Elliott, Robert (Server Storage)" , Dan Williams , "Kani, Toshimitsu" , Borislav Petkov , Ross Zwisler , "H. Peter Anvin" , Thomas Gleixner , Ingo Molnar , Andrew Morton , Arnd Bergmann , "linux-mm@kvack.org" , "linux-kernel@vger.kernel.org" , X86 ML , "linux-nvdimm@lists.01.org" , Juergen Gross , Stefan Bader , Henrique de Moraes Holschuh , Yigal Korman , Konrad Rzeszutek Wilk , Luis Rodriguez , Christoph Hellwig , Matthew Wilcox Subject: Re: [PATCH v10 12/12] drivers/block/pmem: Map NVDIMM with ioremap_wt() Message-ID: <20150601085821.GA15014@gmail.com> References: <1432739944-22633-1-git-send-email-toshi.kani@hp.com> <1432739944-22633-13-git-send-email-toshi.kani@hp.com> <20150529091129.GC31435@pd.tnic> <1432911782.23540.55.camel@misato.fc.hp.com> <94D0CD8314A33A4D9D801C0FE68B40295A92F392@G9W0745.americas.hpqcorp.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Andy Lutomirski wrote: > You answered the wrong question. :) I understand the point of the non-temporal > stores -- I don't understand the point of using non-temporal stores to *WB > memory*. I think we should be okay with having the kernel mapping use WT > instead. WB memory is write-through, but they are still fully cached for reads. So non-temporal instructions influence how the CPU will allocate (or not allocate) WT cache lines. Thanks, Ingo