smp_store_mb() oddity..

smp_store_mb() oddity..

[Linus Torvalds]

Peter/Ingo,
 while resolving a conflict, I noticed that we have the generic
default definition of "smp_store_mb()" be:

     do { WRITE_ONCE(var, value); mb(); } while (0)

which looks pretty odd. Why? That "mb()" is a full memory barrier even
on UP, yet this is clearly a smp barrier.

So I think that "mb()" should be "smp_mb()". Looking at other
architecture definitions, most architectures already do that.

I think this is just left-over from our previous (badly specified)
"set_mb()", and that commit b92b8b35a2e3 ("locking/arch: Rename
set_mb() to smp_store_mb()") just didn't notice.  Our  old set_mb()
was already confused about whether it was a smp barrier or an IO
barrier (eg ARM uses smp_mb, x86 has separate smp/up versions, but
others dop the unconditional memory barrier).

I didn't change this in the merge, because it's not just the generic
version where the conflict was, there's also powerpc, s390 and ia64
that still have the non-smp version too. But some locking person
should probably clean this up... Hint hint,

                             Linus

Re: smp_store_mb() oddity..

[Peter Zijlstra]

On Wed, Jul 01, 2015 at 09:39:44AM -0700, Linus Torvalds wrote:
> Peter/Ingo,
>  while resolving a conflict, I noticed that we have the generic
> default definition of "smp_store_mb()" be:
> 
>      do { WRITE_ONCE(var, value); mb(); } while (0)
> 
> which looks pretty odd. Why? That "mb()" is a full memory barrier even
> on UP, yet this is clearly a smp barrier.
> 
> So I think that "mb()" should be "smp_mb()". Looking at other
> architecture definitions, most architectures already do that.

Agreed.

> I think this is just left-over from our previous (badly specified)
> "set_mb()", and that commit b92b8b35a2e3 ("locking/arch: Rename
> set_mb() to smp_store_mb()") just didn't notice. 

That commit was a sed script :-). but yes I should've noticed something
was up when looking at the result.

> Our  old set_mb()
> was already confused about whether it was a smp barrier or an IO
> barrier (eg ARM uses smp_mb, x86 has separate smp/up versions, but
> others dop the unconditional memory barrier).
> 
> I didn't change this in the merge, because it's not just the generic
> version where the conflict was, there's also powerpc, s390 and ia64
> that still have the non-smp version too. But some locking person
> should probably clean this up... Hint hint,

A quick git grep for smp_store_mb() users throws up all of 7 users, they
all would be fine with smp_mb(). Lemme go do that patch..

git grep -l "smp_store_mb.*\<mb();" | while read file; do sed -i
's/\(smp_store_mb.*\)\<mb();/\1smp_mb();/' $file; done

---
Subject: locking/arch: Make smp_store_mb() use smp_mb()

Linus noticed that there were a few smp_store_mb() implementations that
used mb(), which is inconsistent with the new naming.

Since all smp_store_mb() users really are about SMP ordering, not IO
ordering, change them all to be consistent.

Cc: Tony Luck <tony.luck@intel.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Suggested-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
---
 arch/ia64/include/asm/barrier.h    | 2 +-
 arch/powerpc/include/asm/barrier.h | 2 +-
 arch/s390/include/asm/barrier.h    | 2 +-
 include/asm-generic/barrier.h      | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/ia64/include/asm/barrier.h b/arch/ia64/include/asm/barrier.h
index 843ba435e43b..39ed6515415f 100644
--- a/arch/ia64/include/asm/barrier.h
+++ b/arch/ia64/include/asm/barrier.h
@@ -77,7 +77,7 @@ do {									\
 	___p1;								\
 })
 
-#define smp_store_mb(var, value)	do { WRITE_ONCE(var, value); mb(); } while (0)
+#define smp_store_mb(var, value)	do { WRITE_ONCE(var, value); smp_mb(); } while (0)
 
 /*
  * The group barrier in front of the rsm & ssm are necessary to ensure
diff --git a/arch/powerpc/include/asm/barrier.h b/arch/powerpc/include/asm/barrier.h
index 51ccc7232042..5525268f35c0 100644
--- a/arch/powerpc/include/asm/barrier.h
+++ b/arch/powerpc/include/asm/barrier.h
@@ -34,7 +34,7 @@
 #define rmb()  __asm__ __volatile__ ("sync" : : : "memory")
 #define wmb()  __asm__ __volatile__ ("sync" : : : "memory")
 
-#define smp_store_mb(var, value)	do { WRITE_ONCE(var, value); mb(); } while (0)
+#define smp_store_mb(var, value)	do { WRITE_ONCE(var, value); smp_mb(); } while (0)
 
 #ifdef __SUBARCH_HAS_LWSYNC
 #    define SMPWMB      LWSYNC
diff --git a/arch/s390/include/asm/barrier.h b/arch/s390/include/asm/barrier.h
index e6f8615a11eb..a4dea6050c77 100644
--- a/arch/s390/include/asm/barrier.h
+++ b/arch/s390/include/asm/barrier.h
@@ -36,7 +36,7 @@
 #define smp_mb__before_atomic()		smp_mb()
 #define smp_mb__after_atomic()		smp_mb()
 
-#define smp_store_mb(var, value)		do { WRITE_ONCE(var, value); mb(); } while (0)
+#define smp_store_mb(var, value)		do { WRITE_ONCE(var, value); smp_mb(); } while (0)
 
 #define smp_store_release(p, v)						\
 do {									\
diff --git a/include/asm-generic/barrier.h b/include/asm-generic/barrier.h
index e6a83d712ef6..d716aa564931 100644
--- a/include/asm-generic/barrier.h
+++ b/include/asm-generic/barrier.h
@@ -67,7 +67,7 @@
 #endif
 
 #ifndef smp_store_mb
-#define smp_store_mb(var, value)  do { WRITE_ONCE(var, value); mb(); } while (0)
+#define smp_store_mb(var, value)  do { WRITE_ONCE(var, value); smp_mb(); } while (0)
 #endif
 
 #ifndef smp_mb__before_atomic

Re: smp_store_mb() oddity..

[Heiko Carstens]

On Wed, Jul 01, 2015 at 07:17:55PM +0200, Peter Zijlstra wrote:
> ---
> Subject: locking/arch: Make smp_store_mb() use smp_mb()
> 
> Linus noticed that there were a few smp_store_mb() implementations that
> used mb(), which is inconsistent with the new naming.
> 
> Since all smp_store_mb() users really are about SMP ordering, not IO
> ordering, change them all to be consistent.
> 
> Cc: Tony Luck <tony.luck@intel.com>
> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
> Suggested-by: Linus Torvalds <torvalds@linux-foundation.org>
> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
> ---
> diff --git a/arch/s390/include/asm/barrier.h b/arch/s390/include/asm/barrier.h
> index e6f8615a11eb..a4dea6050c77 100644
> --- a/arch/s390/include/asm/barrier.h
> +++ b/arch/s390/include/asm/barrier.h
> @@ -36,7 +36,7 @@
>  #define smp_mb__before_atomic()		smp_mb()
>  #define smp_mb__after_atomic()		smp_mb()
> 
> -#define smp_store_mb(var, value)		do { WRITE_ONCE(var, value); mb(); } while (0)
> +#define smp_store_mb(var, value)		do { WRITE_ONCE(var, value); smp_mb(); } while (0)
> 
>  #define smp_store_release(p, v)						\

for the s390 part:
Acked-by: Heiko Carstens <heiko.carstens@de.ibm.com>

Re: smp_store_mb() oddity..

[Benjamin Herrenschmidt]

On Wed, 2015-07-01 at 19:17 +0200, Peter Zijlstra wrote:

> Subject: locking/arch: Make smp_store_mb() use smp_mb()
> 
> Linus noticed that there were a few smp_store_mb() implementations that
> used mb(), which is inconsistent with the new naming.
> 
> Since all smp_store_mb() users really are about SMP ordering, not IO
> ordering, change them all to be consistent.
> 
> Cc: Tony Luck <tony.luck@intel.com>

For powerpc:
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

> Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
> Suggested-by: Linus Torvalds <torvalds@linux-foundation.org>
> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
> ---
>  arch/ia64/include/asm/barrier.h    | 2 +-
>  arch/powerpc/include/asm/barrier.h | 2 +-
>  arch/s390/include/asm/barrier.h    | 2 +-
>  include/asm-generic/barrier.h      | 2 +-
>  4 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/ia64/include/asm/barrier.h b/arch/ia64/include/asm/barrier.h
> index 843ba435e43b..39ed6515415f 100644
> --- a/arch/ia64/include/asm/barrier.h
> +++ b/arch/ia64/include/asm/barrier.h
> @@ -77,7 +77,7 @@ do {									\
>  	___p1;								\
>  })
>  
> -#define smp_store_mb(var, value)	do { WRITE_ONCE(var, value); mb(); } while (0)
> +#define smp_store_mb(var, value)	do { WRITE_ONCE(var, value); smp_mb(); } while (0)
>  
>  /*
>   * The group barrier in front of the rsm & ssm are necessary to ensure
> diff --git a/arch/powerpc/include/asm/barrier.h b/arch/powerpc/include/asm/barrier.h
> index 51ccc7232042..5525268f35c0 100644
> --- a/arch/powerpc/include/asm/barrier.h
> +++ b/arch/powerpc/include/asm/barrier.h
> @@ -34,7 +34,7 @@
>  #define rmb()  __asm__ __volatile__ ("sync" : : : "memory")
>  #define wmb()  __asm__ __volatile__ ("sync" : : : "memory")
>  
> -#define smp_store_mb(var, value)	do { WRITE_ONCE(var, value); mb(); } while (0)
> +#define smp_store_mb(var, value)	do { WRITE_ONCE(var, value); smp_mb(); } while (0)
>  
>  #ifdef __SUBARCH_HAS_LWSYNC
>  #    define SMPWMB      LWSYNC
> diff --git a/arch/s390/include/asm/barrier.h b/arch/s390/include/asm/barrier.h
> index e6f8615a11eb..a4dea6050c77 100644
> --- a/arch/s390/include/asm/barrier.h
> +++ b/arch/s390/include/asm/barrier.h
> @@ -36,7 +36,7 @@
>  #define smp_mb__before_atomic()		smp_mb()
>  #define smp_mb__after_atomic()		smp_mb()
>  
> -#define smp_store_mb(var, value)		do { WRITE_ONCE(var, value); mb(); } while (0)
> +#define smp_store_mb(var, value)		do { WRITE_ONCE(var, value); smp_mb(); } while (0)
>  
>  #define smp_store_release(p, v)						\
>  do {									\
> diff --git a/include/asm-generic/barrier.h b/include/asm-generic/barrier.h
> index e6a83d712ef6..d716aa564931 100644
> --- a/include/asm-generic/barrier.h
> +++ b/include/asm-generic/barrier.h
> @@ -67,7 +67,7 @@
>  #endif
>  
>  #ifndef smp_store_mb
> -#define smp_store_mb(var, value)  do { WRITE_ONCE(var, value); mb(); } while (0)
> +#define smp_store_mb(var, value)  do { WRITE_ONCE(var, value); smp_mb(); } while (0)
>  #endif
>  
>  #ifndef smp_mb__before_atomic
> --
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