From: Ralf Baechle <ralf@linux-mips.org>
To: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Thomas Gleixner <tglx@linutronix.de>,
LKML <linux-kernel@vger.kernel.org>,
Jiang Liu <jiang.liu@linux.intel.com>,
Linux-MIPS <linux-mips@linux-mips.org>
Subject: Re: [patch 08/12] MIPS/alchemy: Remove pointless irqdisable/enable
Date: Tue, 14 Jul 2015 11:02:40 +0200 [thread overview]
Message-ID: <20150714090239.GO21180@linux-mips.org> (raw)
In-Reply-To: <CAOLZvyHxZdphtT6rw73=J-_HnFueNcmtxMCHZ-K=JsJt+UHKkg@mail.gmail.com>
On Tue, Jul 14, 2015 at 10:55:08AM +0200, Manuel Lauss wrote:
> On Tue, Jul 14, 2015 at 10:16 AM, Thomas Gleixner <tglx@linutronix.de> wrote:
> > On Tue, 14 Jul 2015, Manuel Lauss wrote:
> >
> >> On Mon, Jul 13, 2015 at 10:46 PM, Thomas Gleixner <tglx@linutronix.de> wrote:
> >> > bcsr_csc_handler() is a cascading interrupt handler. It has a
> >> > disable_irq_nosync()/enable_irq() pair around the generic_handle_irq()
> >> > call. The value of this disable/enable is zero because its a complete
> >> > noop:
> >> >
> >> > disable_irq_nosync() merily increments the disable count without
> >> > actually masking the interrupt. enable_irq() soleley decrements the
> >> > disable count without touching the interrupt chip. The interrupt
> >> > cannot arrive again because the complete call chain runs with
> >> > interrupts disabled.
> >> >
> >> > Remove it.
> >>
> >> Is there another patch this one depends on? The DB1300 board doesn't
> >
> > No.
> >
> >> boot (i.e. interrupts from the cpld aren't serviced) with this patch applied:
> >> (irq 136 is the first serviced by the bcsr cpld):
> >>
> >> irq 136: nobody cared (try booting with the "irqpoll" option)
> >
> > That's weird. Looking deeper, enable_irq() actually calls
> > chip->unmask() unconditionally. So it seems the chip is sensitive to
> > that.
> >
> > Does the following patch on top fix things again?
> >
> > Thanks,
> >
> > tglx
> > ----
> > diff --git a/arch/mips/alchemy/devboards/bcsr.c b/arch/mips/alchemy/devboards/bcsr.c
> > index 3a24f2d6ecfd..ec47abe580c6 100644
> > --- a/arch/mips/alchemy/devboards/bcsr.c
> > +++ b/arch/mips/alchemy/devboards/bcsr.c
> > @@ -88,8 +88,11 @@ EXPORT_SYMBOL_GPL(bcsr_mod);
> > static void bcsr_csc_handler(unsigned int irq, struct irq_desc *d)
> > {
> > unsigned short bisr = __raw_readw(bcsr_virt + BCSR_REG_INTSTAT);
> > + struct irq_chip *chip = irq_desc_get_chip(d);
> >
> > + chained_irq_enter(chip, d);
> > generic_handle_irq(bcsr_csc_base + __ffs(bisr));
> > + chained_irq_exit(chip, d);
> > }
> >
> > static void bcsr_irq_mask(struct irq_data *d)
>
>
> Yes. Add #include <linux/irqchip/chained_irq.h> on top and it works again.
> This hardware is problematic, an older variant with identical verilog
> code in the cpld's
> irq unit works fine without this.
So shall I merge both patches and the header file change together or?
Ralf
next prev parent reply other threads:[~2015-07-14 9:02 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-13 20:45 [patch 00/12] MIPS: Interrupt cleanups and API change preparation Thomas Gleixner
2015-07-13 20:45 ` [patch 01/12] MIPS/jz4740: Consolidate chained IRQ handler install/remove Thomas Gleixner
2015-07-13 20:45 ` [patch 02/12] MIPS/pci-ar71xx: " Thomas Gleixner
2015-07-13 20:45 ` [patch 03/12] MIPS/pci-ar724x: " Thomas Gleixner
2015-07-13 20:45 ` [patch 04/12] MIPS/pci-rt3883: " Thomas Gleixner
2015-07-13 20:50 ` Julia Lawall
2015-07-13 21:07 ` Thomas Gleixner
2015-07-13 20:45 ` [patch 05/12] MIPS/irq: Use access helper irq_data_get_affinity_mask() Thomas Gleixner
2015-07-13 20:46 ` [patch 06/12] MIPS/alchemy: Use irq_set_chip_handler_name_locked() Thomas Gleixner
2015-07-13 20:46 ` [patch 07/12] MIPS/bcm63xx: Use irq_set_handler_locked() Thomas Gleixner
2015-07-13 20:46 ` [patch 08/12] MIPS/alchemy: Remove pointless irqdisable/enable Thomas Gleixner
2015-07-14 6:00 ` Manuel Lauss
2015-07-14 8:16 ` Thomas Gleixner
2015-07-14 8:55 ` Manuel Lauss
2015-07-14 9:02 ` Ralf Baechle [this message]
2015-07-14 9:58 ` Thomas Gleixner
2015-07-13 20:46 ` [patch 09/12] MIPS/ath91: " Thomas Gleixner
2015-07-13 20:46 ` [patch 10/12] MIPS/cavium/octeon: Replace the homebrewn flow handler Thomas Gleixner
2015-07-15 21:19 ` David Daney
2015-07-13 20:46 ` [patch 11/12] MIPS/netlogic: Prepare ipi handlers for irq argument removal Thomas Gleixner
2015-07-13 20:46 ` [patch 12/12] MIPS/PCI/rt3883: Prepare rt3883_pci_irq_handler " Thomas Gleixner
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