Re: [PATCH V4 1/2] mtd: spi-nor: Bindings for Cadence Quad SPI Flash Controller driver.

[Marek Vasut <marex@denx.de>]

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On Monday, March 23, 2015 at 02:36:21 PM, Graham Moore wrote:
> Signed-off-by: Graham Moore <grmoore@opensource.altera.com>
> ---
> V2: Add cdns prefix to driver-specific bindings.
> V3: Use existing property "is-decoded-cs" instead of creating a duplicate,
> "ext-decoder".  Timing parameters are in nanoseconds, not master reference
> clocks.  Remove bus-num completely.

Hi!

do you plan to continue on this driver any soon? If not, I'd like to take
over the mainlining if you're not opposed. I'd like to see this in mainline
soon.

btw you'll need some kind of a variation on the attached two patches in
the next iteration.

Best regards,
Marek Vasut

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From e305b9a9cd80e56aeaa19b3c2a5bb26ba3adf8d7 Mon Sep 17 00:00:00 2001
From: Marek Vasut <marex@denx.de>
Date: Fri, 24 Jul 2015 10:10:23 +0200
Subject: [PATCH 1/2] mtd: spi-nor: Fix SRAM config on CQSPI

Make sure the SRAM configuration register is loaded with correct data
when initializing the controller. This might not always be the case,
since for example U-Boot configures this register and even toggling the
controller reset doesn't reset it to default value. Thus, explicitly
set the register.

Signed-off-by: Marek Vasut <marex@denx.de>
---
 drivers/mtd/spi-nor/cadence-quadspi.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/mtd/spi-nor/cadence-quadspi.c b/drivers/mtd/spi-nor/cadence-quadspi.c
index fa7b421..a18732c 100644
--- a/drivers/mtd/spi-nor/cadence-quadspi.c
+++ b/drivers/mtd/spi-nor/cadence-quadspi.c
@@ -1100,6 +1100,9 @@ static void cqspi_controller_init(struct cqspi_st *cqspi)
 	/* Disable all interrupts. */
 	writel(0, cqspi->iobase + CQSPI_REG_IRQMASK);
 
+	/* Configure the SRAM split to 1:1 . */
+	writel(0x40, cqspi->iobase + CQSPI_REG_SRAMPARTITION);
+
 	cqspi_controller_enable(cqspi);
 }
 
-- 
2.1.4


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From fac766b916a64c263fdb044bdaba80a52f582ecb Mon Sep 17 00:00:00 2001
From: Marek Vasut <marex@denx.de>
Date: Fri, 24 Jul 2015 14:10:09 +0200
Subject: [PATCH 2/2] mtd: spi-nor: Pass OF node into subdevs

The entire mechanism by which the CQSPI driver probes the SPI NORs
is probably broken, in particular because it uses dev pointer of
the CQSPI and passes it into spi_nor_scan(). Since the dev->of_node
therefore points into the of_node of the CQSPI, the spi-nor driver
cannot properly parse the OF properties of the subnode and thus can
not configure itself accordingly. Add a nasty hack to work around
this for now.

Signed-off-by: Marek Vasut <marex@denx.de>
---
 drivers/mtd/spi-nor/cadence-quadspi.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mtd/spi-nor/cadence-quadspi.c b/drivers/mtd/spi-nor/cadence-quadspi.c
index a18732c..017460e 100644
--- a/drivers/mtd/spi-nor/cadence-quadspi.c
+++ b/drivers/mtd/spi-nor/cadence-quadspi.c
@@ -1203,6 +1203,7 @@ static int cqspi_probe(struct platform_device *pdev)
 
 		nor->mtd = mtd;
 		nor->dev = dev;
+		nor->dev->of_node = np;
 		nor->priv = cqspi;
 		mtd->priv = nor;
 
-- 
2.1.4