From: Peter Zijlstra <peterz@infradead.org>
To: Vineet Gupta <vgupta@synopsys.com>
Cc: Oleg Nesterov <oleg@redhat.com>,
Alexander Viro <viro@zeniv.linux.org.uk>,
linux-fsdevel@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] coredump: Replace opencoded set_mask_bits()
Date: Fri, 7 Aug 2015 17:45:25 +0200 [thread overview]
Message-ID: <20150807154525.GO16853@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <55C4D02A.5000902@synopsys.com>
On Fri, Aug 07, 2015 at 09:05:06PM +0530, Vineet Gupta wrote:
> On Friday 07 August 2015 08:27 PM, Peter Zijlstra wrote:
> > On Fri, Aug 07, 2015 at 08:14:03PM +0530, Vineet Gupta wrote:
> >
> >> > See, I have such a cmpxchg loop in ARC code - originally from Peter :-)
> >> > arch/arc/kernel/smp.c. @ipi_data_ptr is NOT atomic_t
> >> >
> >> > do {
> >> > new = old = ACCESS_ONCE(*ipi_data_ptr);
> >> > new |= 1U << msg;
> >> > } while (cmpxchg(ipi_data_ptr, old, new) != old);
> >> >
> > Well, you'll have atomic_or() real soon now.
>
> Doesn't help my cause - ipi_data_ptr is not atomic_t - hence my prev question in
> this thread
A cast will work :-)
But yes, ideally everything will be type safe because of those archs
that cannot have atomic RmW ops like !ARC_HAS_LLSC.
Mixing cmpxchg()/xchg() with regular stores is broken on those.
Fwiw, you might want to set ARCH_SUPPORTS_ATOMIC_RMW for ARC_HAS_LLSC.
next prev parent reply other threads:[~2015-08-07 15:45 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-08-07 8:16 [PATCH] coredump: Replace opencoded set_mask_bits() Vineet Gupta
2015-08-07 11:57 ` Oleg Nesterov
2015-08-07 14:44 ` Vineet Gupta
2015-08-07 14:57 ` Peter Zijlstra
2015-08-07 15:35 ` Vineet Gupta
2015-08-07 15:45 ` Peter Zijlstra [this message]
2015-08-07 15:58 ` Vineet Gupta
2015-08-07 16:09 ` Peter Zijlstra
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