From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1946605AbbHGXzU (ORCPT ); Fri, 7 Aug 2015 19:55:20 -0400 Received: from smtp.codeaurora.org ([198.145.29.96]:37222 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1946411AbbHGXzS (ORCPT ); Fri, 7 Aug 2015 19:55:18 -0400 Date: Fri, 7 Aug 2015 16:55:15 -0700 From: Stephen Boyd To: Robert Jarzmik Cc: Michael Turquette , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Ezequiel Garcia Subject: Re: [PATCH v2] clk: pxa: pxa3xx: fix CKEN register access Message-ID: <20150807235515.GF16477@codeaurora.org> References: <1438669293-6033-1-git-send-email-robert.jarzmik@free.fr> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1438669293-6033-1-git-send-email-robert.jarzmik@free.fr> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 08/04, Robert Jarzmik wrote: > Clocks 0 to 31 are on CKENA, and not CKENB. The clock register names > were inadequately inverted. As a consequence, all clock operations were > happening on CKENB, because almost all but 2 clocks are on CKENA. > > As the clocks were activated by the bootloader in the former tests, it > escaped the testing that the wrong clock gate was manipulated. The error > was revealed by changing the pxa3xx-and driver to a module, where tupon > unloading the wrong clock was disabled in CKENB. > > Fixes: 9bbb8a338fb2 ("clk: pxa: add pxa3xx clock driver") > Signed-off-by: Robert Jarzmik > --- Applied to clk-fixes. Sorry, got busy last few days. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project