From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755339AbbHQLxf (ORCPT ); Mon, 17 Aug 2015 07:53:35 -0400 Received: from mx0a-0016f401.pphosted.com ([67.231.148.174]:65436 "EHLO mx0a-0016f401.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755314AbbHQLxd (ORCPT ); Mon, 17 Aug 2015 07:53:33 -0400 Date: Mon, 17 Aug 2015 19:49:54 +0800 From: Jisheng Zhang To: CC: , , Subject: Re: [PATCH v2] mmc: sdhci: also set driver type for MMC_DDR52 Message-ID: <20150817194954.691729d7@xhacker> In-Reply-To: <1439812041-6596-1-git-send-email-jszhang@marvell.com> References: <1439812041-6596-1-git-send-email-jszhang@marvell.com> X-Mailer: Claws Mail 3.11.1 (GTK+ 2.24.28; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2015-08-17_01:,, signatures=0 X-Proofpoint-Spam-Details: rule=inbound_notspam policy=inbound score=0 kscore.is_bulkscore=0 kscore.compositescore=1 compositescore=0.9 suspectscore=1 malwarescore=0 phishscore=0 bulkscore=0 kscore.is_spamscore=0 rbsscore=0.9 spamscore=0 urlsuspectscore=0.9 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1507310000 definitions=main-1508170199 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 17 Aug 2015 19:47:21 +0800 Jisheng Zhang wrote: > commit bb8175a8aa42 ("mmc: sdhci: clarify DDR timing mode between > SD-UHS and eMMC") added MMC_DDR52 as eMMC's DDR mode to be > distinguished from SD-UHS, but it missed setting driver type for > MMC_DDR52 timing mode. This patches adds the missing driver type > setting. This patch fixes unstable emmc read/write on marvell BG2Q DMP board. > > Fixes: bb8175a8aa42 ("mmc: sdhci: clarify DDR timing mode ...") > Signed-off-by: Jisheng Zhang > --- > drivers/mmc/host/sdhci.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c > index 1dbe932..32f2a07 100644 > --- a/drivers/mmc/host/sdhci.c > +++ b/drivers/mmc/host/sdhci.c > @@ -1559,7 +1559,8 @@ static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios) > (ios->timing == MMC_TIMING_UHS_SDR25) || > (ios->timing == MMC_TIMING_UHS_SDR50) || > (ios->timing == MMC_TIMING_UHS_SDR104) || > - (ios->timing == MMC_TIMING_UHS_DDR50))) { > + (ios->timing == MMC_TIMING_UHS_DDR50) || > + (ios->timing == MMC_TIMING_MMC_DDR52))) { I'm not sure whether MMC_HS400 need such fix or not. > u16 preset; > > sdhci_enable_preset_value(host, true);