From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753462AbbHTPBB (ORCPT ); Thu, 20 Aug 2015 11:01:01 -0400 Received: from down.free-electrons.com ([37.187.137.238]:41880 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752894AbbHTPBA (ORCPT ); Thu, 20 Aug 2015 11:01:00 -0400 Date: Thu, 20 Aug 2015 17:00:57 +0200 From: Maxime Ripard To: Michal Suchanek Cc: linux-sunxi@googlegroups.com, Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Russell King , Mark Brown , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org Subject: Re: [PATCH 7/9] ARM: dts: sun5i: add SPI pins on A13 and A10s Message-ID: <20150820150057.GY30520@lukather> References: <90730047894f6ec84cd70062a27b7085c2016260.1440080122.git.hramrach@gmail.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="vavxEBoGuREFpPEl" Content-Disposition: inline In-Reply-To: <90730047894f6ec84cd70062a27b7085c2016260.1440080122.git.hramrach@gmail.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --vavxEBoGuREFpPEl Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, Aug 20, 2015 at 02:19:47PM -0000, Michal Suchanek wrote: > According to datasheet some pins are available on A10s only while others > are shared with A13. >=20 > Signed-off-by: Michal Suchanek > --- > This time add all spi pins and make the CS pins separate as is seen with > current sun4i DTs > --- > arch/arm/boot/dts/sun5i-a10s.dtsi | 21 +++++++++++++++++ > arch/arm/boot/dts/sun5i.dtsi | 49 +++++++++++++++++++++++++++++++++= ++++++ > 2 files changed, 70 insertions(+) >=20 > diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-= a10s.dtsi > index f11efb7..d9610fa 100644 > --- a/arch/arm/boot/dts/sun5i-a10s.dtsi > +++ b/arch/arm/boot/dts/sun5i-a10s.dtsi > @@ -201,6 +201,27 @@ > allwinner,drive =3D ; > allwinner,pull =3D ; > }; > + > + spi1_cs1_pins_a: spi1_cs1@0 { > + allwinner,pins =3D "PG13"; > + allwinner,function =3D "spi1"; > + allwinner,drive =3D ; > + allwinner,pull =3D ; > + }; > + > + spi2_pins_a: spi2@0 { > + allwinner,pins =3D "PB12", "PB13", "PB14"; > + allwinner,function =3D "spi1"; > + allwinner,drive =3D ; > + allwinner,pull =3D ; > + }; > + > + spi2_cs0_pins_a: spi2_cs0@0 { > + allwinner,pins =3D "PB11"; > + allwinner,function =3D "spi1"; > + allwinner,drive =3D ; > + allwinner,pull =3D ; > + }; spi2 nodes with spi1 function ??? How can that even work? > }; > =20 > &sram_a { > diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i.dtsi > index 54b0978..7d32d49 100644 > --- a/arch/arm/boot/dts/sun5i.dtsi > +++ b/arch/arm/boot/dts/sun5i.dtsi > @@ -516,6 +516,55 @@ > allwinner,drive =3D ; > allwinner,pull =3D ; > }; > + > + spi0_pins_a: spi0@0 { > + allwinner,pins =3D "PC00", "PC01", "PC02"; > + allwinner,function =3D "spi0"; > + allwinner,drive =3D ; > + allwinner,pull =3D ; > + }; > + > + spi0_cs0_pins_a: spi0_cs0@0 { > + allwinner,pins =3D "PC03"; > + allwinner,function =3D "spi0"; > + allwinner,drive =3D ; > + allwinner,pull =3D ; > + }; > + > + spi1_pins_a: spi1@0 { > + allwinner,pins =3D "PG10", "PG11", "PG12"; > + allwinner,function =3D "spi1"; > + allwinner,drive =3D ; > + allwinner,pull =3D ; > + }; > + > + spi1_cs0_pins_a: spi1_cs0@0 { > + allwinner,pins =3D "PG09"; > + allwinner,function =3D "spi1"; > + allwinner,drive =3D ; > + allwinner,pull =3D ; > + }; > + > + spi2_pins_b: spi2@1 { > + allwinner,pins =3D "PE01", "PE02", "PE03"; > + allwinner,function =3D "spi2"; > + allwinner,drive =3D ; > + allwinner,pull =3D ; > + }; > + > + spi2_cs0_pins_b: spi2_cs1@1 { > + allwinner,pins =3D "PE00"; > + allwinner,function =3D "spi2"; > + allwinner,drive =3D ; > + allwinner,pull =3D ; > + }; > + > + spi2_cs1_pins_a: spi2_cs1@0 { > + allwinner,pins =3D "PB10"; > + allwinner,function =3D "spi2"; > + allwinner,drive =3D ; > + allwinner,pull =3D ; > + }; Please only add the pins you intend to use. Maxime --=20 Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com --vavxEBoGuREFpPEl Content-Type: application/pgp-signature; name="signature.asc" Content-Description: Digital signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAEBAgAGBQJV1eupAAoJEBx+YmzsjxAgKmgP/AuWxRTwLuBLtNHlT7YYwcXm /t9sq8g5xyqURDq3oygyia9x11BVdouezPRWQL8ymKvJRr6BpRdR16eC3YIV7TkX nJs889JADo9Y3zqEFXkU5UJxc9LsPSV42d3REC0vgHsyw9sl/uTnaK5nw2ccafqF L8Z6DLed34wGpd0G4DFNXiHc0lmqBJ8Td5UR31c6Oe4R7uhpbP0amkTrr8o2B6T9 z1ymuSVYfvM/WwDHpFGTfpYtXLHHcdoCHtrsUQEH8zJDFOv/Jy0O9s/UVRhYKHlp 9ydMsXYdBkwrvpJfEeZVZ57RCTf+DkAkPOHxerMKRcznItyVFuqnOVd4/K+7IZma RvJ5CaR8zoQTljpKn2VSURL+WDKiANoUH8IoZGUh59qyTot8mCo93AvODnMUr/2+ PY5qimI5XTCQuKl4ySf4JnMkkqbSjLNfW9iKH1fVwqFKvpHqHoCQlKJtW3tjyBJV 0GgVevXMYFlO/PGmOOya0C/ujfR0XKUMk1nKKTYb+/aj7jy49ue5dPkBxomTa1v2 fTQeSDBuF+3e4kLst8llsEQg2CQblY20E3Yn4PHT3wdrTEyJl3DSS7E/CGkJ0PVM Nz7nVamd/7GTzJBlPSIBjd40b+xtBqRJ8rMM/5wCtxP8HWnfftokifm+hK8UqABz xV68wGCZ2zam37wkUefa =IYpL -----END PGP SIGNATURE----- --vavxEBoGuREFpPEl--