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From: Pavel Machek <pavel@ucw.cz>
To: Ingo Molnar <mingo@kernel.org>
Cc: Chen Yu <yu.c.chen@intel.com>,
	rjw@rjwysocki.net, tglx@linutronix.de, mingo@redhat.com,
	hpa@zytor.com, rui.zhang@intel.com, lenb@kernel.org,
	x86@kernel.org, linux-pm@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH] [v2] x86, suspend: Save/restore extra MSR registers for suspend
Date: Sun, 23 Aug 2015 10:43:38 +0200	[thread overview]
Message-ID: <20150823084338.GA11065@amd> (raw)
In-Reply-To: <20150823062033.GB18134@gmail.com>

On Sun 2015-08-23 08:20:33, Ingo Molnar wrote:
> 
> * Pavel Machek <pavel@ucw.cz> wrote:
> 
> > On Fri 2015-08-21 19:53:34, Chen Yu wrote:
> > > A bug is reported(https://bugzilla.redhat.com/show_bug.cgi?id=1227208)
> > > that, after resuming from S3, CPU is working at a low speed.
> > > After investigation, it is found that, BIOS has modified the value
> > > of THERM_CONTROL register during S3, changes it from 0 to 0x10,
> > > while the latter means CPU can only get 25% of the Duty Cycle,
> > > and this caused the problem.
> > > 
> > > Simple scenario to reproduce:
> > > 1.Boot up system
> > > 2.Get MSR with address 0x19a, it should output 0
> > > 3.Put system into sleep, then wake up
> > > 4.Get MSR with address 0x19a, it should output 0(actual it outputs 0x10)
> > > 
> > > Although this is a BIOS issue, it would be more robust for linux to deal
> > > with this situation. This patch fixes this issue by introducing a framework
> > > for saving/restoring specify MSR registers(THERM_CONTROL in this case)
> > > on suspend/resume.
> > > 
> > > When user finds a problematic platform that requires save/restore MSRs,
> > > he can simply add quirk in msr_save_dmi_table, and customizes MSR
> > > registers in quirk callback, for example:
> > > 
> > > unsigned int msr_id_need_to_save[] = {MSR_ID0, MSR_ID1, MSR_ID2...};
> > > 
> > > and system ensures that, once resumed from suspend, these MSR indicated
> > > by IDs will be restored to their original values before suspend.
> > > 
> > > Since both 64/32-bit kernels are affected, this patch covers 64/32-bit
> > > common code path. And because the MSR ids specified by user might not be
> > > available or readable in any situation, we use rdmsrl_safe to safely
> > > save these MSR registers.
> > > 
> > > Tested-by: Marcin Kaszewski <marcin.kaszewski@intel.com>
> > > Signed-off-by: Chen Yu <yu.c.chen@intel.com>
> > 
> > Acked-by: Pavel Machek <pavel@ucw.cz>
> 
> So I like the general structure of the patch and I like the MSR saving mechanism 
> it introduces, but it is full of typos and small stylistic uncleanlinesses which 
> need to be fixed before this patch can be applied. Please don't ack incomplete 
> patches.

Plus, I acked V2 when V3 was available.

I was under impression it was a regression, so "slightly urgent", but
it looks that was wrong impression, too.

Sorry,
									Pavel
-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html

  reply	other threads:[~2015-08-23  8:43 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-08-21 11:53 [PATCH] [v2] x86, suspend: Save/restore extra MSR registers for suspend Chen Yu
2015-08-21 12:34 ` Nigel Cunningham
2015-08-21 16:24   ` Chen, Yu C
2015-08-22 20:30 ` Pavel Machek
2015-08-23  6:20   ` Ingo Molnar
2015-08-23  8:43     ` Pavel Machek [this message]
2015-08-24  3:28       ` Chen, Yu C
2015-08-24  3:24     ` Chen, Yu C
2015-08-24  8:49 ` Borislav Petkov
2015-08-25  1:58   ` Chen, Yu C

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