From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932344AbbIBXc1 (ORCPT ); Wed, 2 Sep 2015 19:32:27 -0400 Received: from mga09.intel.com ([134.134.136.24]:61716 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754913AbbIBXbb (ORCPT ); Wed, 2 Sep 2015 19:31:31 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.17,457,1437462000"; d="scan'208";a="796659451" Subject: [PATCH 11/15] x86, fpu: rework YMM definition To: dave@sr71.net Cc: dave.hansen@linux.intel.com, mingo@redhat.com, x86@kernel.org, bp@alien8.de, fenghua.yu@intel.com, tim.c.chen@linux.intel.com, linux-kernel@vger.kernel.org From: Dave Hansen Date: Wed, 02 Sep 2015 16:31:29 -0700 References: <20150902233123.3A7E5FB0@viggo.jf.intel.com> In-Reply-To: <20150902233123.3A7E5FB0@viggo.jf.intel.com> Message-Id: <20150902233129.B4EB045F@viggo.jf.intel.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Dave Hansen We are about to rework all of the "extended state" definitions. This makes the 'ymm' naming consistent with the AVX-512 types we will introduce later. We also add a convenience type: "reg_128_bit" so that we do not have to spell out our arithmetic. Signed-off-by: Dave Hansen Cc: Ingo Molnar Cc: x86@kernel.org Cc: Borislav Petkov Cc: Fenghua Yu Cc: Tim Chen Cc: linux-kernel@vger.kernel.org --- b/arch/x86/include/asm/fpu/types.h | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff -puN arch/x86/include/asm/fpu/types.h~x86-fpu-rework-ymm-types arch/x86/include/asm/fpu/types.h --- a/arch/x86/include/asm/fpu/types.h~x86-fpu-rework-ymm-types 2015-09-02 16:23:51.041462059 -0700 +++ b/arch/x86/include/asm/fpu/types.h 2015-09-02 16:24:20.692808898 -0700 @@ -128,17 +128,23 @@ enum xfeature { #define FIRST_EXTENDED_XFEATURE XFEATURE_YMM +struct reg_128_bit { + u8 regbytes[128/8]; +}; + /* + * State component 2: + * * There are 16x 256-bit AVX registers named YMM0-YMM15. * The low 128 bits are aliased to the 16 SSE registers (XMM0-XMM15) - * and are stored in 'struct fxregs_state::xmm_space[]'. + * and are stored in 'struct fxregs_state::xmm_space[]' in the + * "legacy" area. * - * The high 128 bits are stored here: - * 16x 128 bits == 256 bytes. + * The high 128 bits are stored here. */ struct ymmh_struct { - u8 ymmh_space[256]; -}; + struct reg_128_bit hi_ymm[16]; +} __packed; /* Intel MPX support: */ _