From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759849AbbIWAbW (ORCPT ); Tue, 22 Sep 2015 20:31:22 -0400 Received: from mail.kernel.org ([198.145.29.136]:33659 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759791AbbIWAbU (ORCPT ); Tue, 22 Sep 2015 20:31:20 -0400 Date: Tue, 22 Sep 2015 17:31:14 -0700 From: Shawn Guo To: Sanchayan Maity Cc: srinivas.kandagatla@linaro.org, gregkh@linuxfoundation.org, maxime.ripard@free-electrons.com, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, stefan@agner.ch, kernel@pengutronix.de Subject: Re: [PATCH v10 1/4] clk: clk-vf610: Add clock for Vybrid OCOTP controller Message-ID: <20150923003114.GB3529@tiger> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Sep 07, 2015 at 01:51:35PM +0530, Sanchayan Maity wrote: > Add clock support for Vybrid On-Chip One Time Programmable > (OCOTP) controller. > > While the OCOTP block does not require explicit clock gating, > for programming the OCOTP timing register the clock rate of > ipg clock is required for timing calculations related to fuse > and shadow register read sequence. We explicitly specify the > ipg clock for OCOTP as a result. > > Signed-off-by: Sanchayan Maity Applied this one, thanks.