From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751394AbbJGHAl (ORCPT ); Wed, 7 Oct 2015 03:00:41 -0400 Received: from mail-wi0-f178.google.com ([209.85.212.178]:38238 "EHLO mail-wi0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750952AbbJGHAj (ORCPT ); Wed, 7 Oct 2015 03:00:39 -0400 Date: Wed, 7 Oct 2015 09:00:37 +0200 From: Jiri Pirko To: Arnd Bergmann Cc: Joe Perches , netdev@vger.kernel.org, davem@davemloft.net, Jiri Pirko , Ido Schimmel , linux-kernel@vger.kernel.org, Elad Raz , Scott Feldman , linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2] mlxsw: fix warnings for big-endian 32-bit dma_addr_t Message-ID: <20151007070036.GE2152@nanopsycho.orion> References: <30258520.VaA2vDyUiY@wuerfel> <1444200782.26237.8.camel@perches.com> <9933338.DDyBa8BQum@wuerfel> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <9933338.DDyBa8BQum@wuerfel> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Wed, Oct 07, 2015 at 08:58:34AM CEST, arnd@arndb.de wrote: >The recently added mlxsw driver produces warnings in ARM >allmodconfig: > >drivers/net/ethernet/mellanox/mlxsw/pci.c: In function 'mlxsw_pci_cmd_exec': >drivers/net/ethernet/mellanox/mlxsw/pci.c:1585:59: warning: right shift count >= width of type [-Wshift-count-overflow] >linux/byteorder/big_endian.h:38:51: note: in definition of macro '__cpu_to_be32' >drivers/net/ethernet/mellanox/mlxsw/pci.c:76:2: note: in expansion of macro 'iowrite32be' > >This uses upper_32_bits() to extract the bits while avoiding that warning. > >Signed-off-by: Arnd Bergmann >Acked-by: Jiri Pirko >Fixes: eda6500a987a "mlxsw: Add PCI bus implementation" >--- >I've kept Jiri's Ack despite having in effect a completely different >patch here, as the effect and the changelog is the same for practical purposes. >Hope that's ok. It's ok, thanks.