From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752330AbbJMHcF (ORCPT ); Tue, 13 Oct 2015 03:32:05 -0400 Received: from mail-wi0-f169.google.com ([209.85.212.169]:35887 "EHLO mail-wi0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751902AbbJMHcC (ORCPT ); Tue, 13 Oct 2015 03:32:02 -0400 Date: Tue, 13 Oct 2015 08:31:59 +0100 From: Lee Jones To: Steve Twiss Cc: LINUXKERNEL , Samuel Ortiz , David Dajun Chen , Support Opensource Subject: Re: [PATCH V1 1/2] mfd: da9053: Addition of extra registers for GPIOs 8-13 Message-ID: <20151013073159.GS17172@x1> References: <9881d4857f21b2a76f092b4cf2659910ba75150d.1444317472.git.stwiss.opensource@diasemi.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <9881d4857f21b2a76f092b4cf2659910ba75150d.1444317472.git.stwiss.opensource@diasemi.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 08 Oct 2015, Steve Twiss wrote: > From: Steve Twiss > > Definitions for GPIO registers 8, 9, 10, 11, 12 and 13 are added into > the register header file. > > - DA9052_GPIO_8_9_REG 25 > - DA9052_GPIO_10_11_REG 26 > - DA9052_GPIO_12_13_REG 27 > > A modification is also made to the MFD core code to define these registers > as readable and writable. The functions for da9052_reg_readable() and > da9052_reg_writeable() have had their case statements altered to include > these new registers. > > Signed-off-by: Steve Twiss > > --- > This patch applies against linux-next and v4.3-rc4 > > > drivers/mfd/da9052-core.c | 6 ++++++ > include/linux/mfd/da9052/reg.h | 3 +++ > 2 files changed, 9 insertions(+) Applied, thanks. > diff --git a/drivers/mfd/da9052-core.c b/drivers/mfd/da9052-core.c > index 46e3840..c0bf68a 100644 > --- a/drivers/mfd/da9052-core.c > +++ b/drivers/mfd/da9052-core.c > @@ -51,6 +51,9 @@ static bool da9052_reg_readable(struct device *dev, unsigned int reg) > case DA9052_GPIO_2_3_REG: > case DA9052_GPIO_4_5_REG: > case DA9052_GPIO_6_7_REG: > + case DA9052_GPIO_8_9_REG: > + case DA9052_GPIO_10_11_REG: > + case DA9052_GPIO_12_13_REG: > case DA9052_GPIO_14_15_REG: > case DA9052_ID_0_1_REG: > case DA9052_ID_2_3_REG: > @@ -178,6 +181,9 @@ static bool da9052_reg_writeable(struct device *dev, unsigned int reg) > case DA9052_GPIO_2_3_REG: > case DA9052_GPIO_4_5_REG: > case DA9052_GPIO_6_7_REG: > + case DA9052_GPIO_8_9_REG: > + case DA9052_GPIO_10_11_REG: > + case DA9052_GPIO_12_13_REG: > case DA9052_GPIO_14_15_REG: > case DA9052_ID_0_1_REG: > case DA9052_ID_2_3_REG: > diff --git a/include/linux/mfd/da9052/reg.h b/include/linux/mfd/da9052/reg.h > index c4dd3a8..5010f97 100644 > --- a/include/linux/mfd/da9052/reg.h > +++ b/include/linux/mfd/da9052/reg.h > @@ -65,6 +65,9 @@ > #define DA9052_GPIO_2_3_REG 22 > #define DA9052_GPIO_4_5_REG 23 > #define DA9052_GPIO_6_7_REG 24 > +#define DA9052_GPIO_8_9_REG 25 > +#define DA9052_GPIO_10_11_REG 26 > +#define DA9052_GPIO_12_13_REG 27 > #define DA9052_GPIO_14_15_REG 28 > > /* POWER SEQUENCER CONTROL REGISTERS */ -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog