From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753002AbbJOMo6 (ORCPT ); Thu, 15 Oct 2015 08:44:58 -0400 Received: from foss.arm.com ([217.140.101.70]:35443 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752892AbbJOMo4 (ORCPT ); Thu, 15 Oct 2015 08:44:56 -0400 Date: Thu, 15 Oct 2015 13:44:51 +0100 From: Mark Rutland To: Christoffer Dall Cc: "Suzuki K. Poulose" , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, catalin.marinas@arm.com, will.deacon@arm.com, steve.capper@linaro.org, marc.zyngier@arm.com, ard.biesheuvel@linaro.org Subject: Re: [PATCHv3 03/11] arm64: Introduce helpers for page table levels Message-ID: <20151015124451.GI8825@leverpostej> References: <1444821634-1689-1-git-send-email-suzuki.poulose@arm.com> <1444821634-1689-4-git-send-email-suzuki.poulose@arm.com> <20151015113735.GB21930@cbox> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20151015113735.GB21930@cbox> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Oct 15, 2015 at 01:37:35PM +0200, Christoffer Dall wrote: > On Wed, Oct 14, 2015 at 12:20:26PM +0100, Suzuki K. Poulose wrote: > > Introduce helpers for finding the number of page table > > levels required for a given VA width, shift for a particular > > page table level. > > > > Convert the existing users to the new helpers. More users > > to follow. > > > > Cc: Ard Biesheuvel > > Cc: Mark Rutland > > Cc: Catalin Marinas > > Cc: Will Deacon > > Cc: Marc Zyngier > > Signed-off-by: Suzuki K. Poulose > > > > --- > > Changes since V2: > > - Add comments around the macros > > - Change ARM64_HW_PGTABLE_LEVEL_SHIFT to accept pagetable level as > > described by ARM ARM > > --- > > arch/arm64/include/asm/pgtable-hwdef.h | 25 ++++++++++++++++++++++--- > > 1 file changed, 22 insertions(+), 3 deletions(-) > > > > diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h > > index 95c1ec0..c6194ab 100644 > > --- a/arch/arm64/include/asm/pgtable-hwdef.h > > +++ b/arch/arm64/include/asm/pgtable-hwdef.h > > @@ -16,13 +16,31 @@ > > #ifndef __ASM_PGTABLE_HWDEF_H > > #define __ASM_PGTABLE_HWDEF_H > > > > +/* > > + * Number of page-table levels required to address 'va_bits' wide > > + * address, without section mapping. We resolve the top (va_bits - PAGE_SHIFT) > > + * bits with (PAGE_SHIFT - 3) bits at each page table level. Hence: > > + * > > + * levels = DIV_ROUND_UP((va_bits - PAGE_SHIFT), (PAGE_SHIFT - 3)) > > + * > > + * We cannot include linux/kernel.h which defines DIV_ROUND_UP here > > + * due to build issues. So we use the following magic formula. > > + */ > > +#define ARM64_HW_PGTABLE_LEVELS(va_bits) (((va_bits) - 4) / (PAGE_SHIFT - 3)) > > + > > +/* > > + * Size mapped by an entry at level n > > + * We map PAGE_SHIFT - 3 at all levels, except the PAGE_SHIFT bits at the last level > > + */ > > +#define ARM64_HW_PGTABLE_LEVEL_SHIFT(n) ((PAGE_SHIFT - 3) * (4 - (n)) + 3) > > I feel like I'm partially failing the interview question again, in that > I don't fully understand the '+ 3' in the end? The last level handles PAGE_SHIFT bits (the bits from the VA that are the same in the PA). We only accounted for (PAGE_SHIFT - 3) bits at each level when multiplying, so we add those 3 missing bits back at the end. Thanks, Mark.