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Date: Fri, 16 Oct 2015 08:44:13 +0200
From: Maxime Ripard <maxime.ripard@free-electrons.com>
To: Chen-Yu Tsai <wens@csie.org>
Cc: Samuel Ortiz <sameo@linux.intel.com>, Lee Jones <lee.jones@linaro.org>,
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Subject: Re: [PATCH 5/6] ARM: dts: sun8i: Add NMI interrupt controller node
Message-ID: <20151016064413.GH2711@lukather>
References: <1444840342-9233-1-git-send-email-wens@csie.org>
 <1444840342-9233-6-git-send-email-wens@csie.org>
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On Thu, Oct 15, 2015 at 12:32:21AM +0800, Chen-Yu Tsai wrote:
> The NMI interrupt controller is in charge of the NMI pin exposed by
> the SoC to the PMIC. The PMIC signals interrupts through this.
>=20
> Signed-off-by: Chen-Yu Tsai <wens@csie.org>

Applied, thanks!
Maxime

--=20
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com

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