From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932291AbbJSPgw (ORCPT ); Mon, 19 Oct 2015 11:36:52 -0400 Received: from mail.kernel.org ([198.145.29.136]:48923 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754286AbbJSPg3 (ORCPT ); Mon, 19 Oct 2015 11:36:29 -0400 Date: Mon, 19 Oct 2015 23:36:18 +0800 From: Shawn Guo To: Michael Turquette Cc: Shengjiu Wang , kernel@pengutronix.de, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux@arm.linux.org.uk, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH V3 1/2] clk: imx6: Add SPDIF_GCLK clock in clock tree Message-ID: <20151019153618.GA14709@tiger> References: <20151019152807.20687.15779@quantum> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20151019152807.20687.15779@quantum> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Mike, On Mon, Oct 19, 2015 at 08:28:07AM -0700, Michael Turquette wrote: > Quoting Shengjiu Wang (2015-10-10 03:15:06) > > Correct SPDIF clock setting issue in clock tree, the SPDIF_GCLK is also > > one clock of SPDIF, which is missed before. > > > > We found an issue that imx can't enter low power mode with spdif > > if IMX6x_CLK_SPDIF is used as the core clock of spdif. Because > > spdif driver will register IMX6x_CLK_SPDIF clock to regmap, regmap will do > > clk_prepare in init function, then IMX6x_CLK_SPDIF clock is prepared in probe, > > so its parent clock (PLL clock) is prepared, the prepare operation of > > PLL clock is to enable the clock. But I.MX needs all PLL clock is disabled, > > then it can enter low power mode. > > > > So we can't use IMX6x_CLK_SPDIF as the core clock of spdif, the correct spdif > > core clock is SPDIF_GCLK, which share same gate bit with IMX6x_CLK_SPDIF clock. > > SPDIF_GCLK's parent clock is ipg clock. > > I'm confused by this. Is there really a new clock signal to be added, or > this just to workaround some reference counting problems with regmap? I was confused by the previous version of the patch, and asked Shengjiu to improve the commit log, which seems still not so good. In short, the patch does add a missing clock, and the missing of the clock is discovered by a low-power-mode issue when SPDIF driver is enabled. > > > > > Signed-off-by: Shengjiu Wang > > Please Cc the linux-clk@vger.kernel.org mailing list for future clock > driver patches. Right, should have reminded him. I will keep my eyes more closely on this. Shawn