From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
	id S932622AbbJ0Ojx (ORCPT <rfc822;w@1wt.eu>);
	Tue, 27 Oct 2015 10:39:53 -0400
Received: from foss.arm.com ([217.140.101.70]:56769 "EHLO foss.arm.com"
	rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP
	id S932502AbbJ0Oju (ORCPT <rfc822;linux-kernel@vger.kernel.org>);
	Tue, 27 Oct 2015 10:39:50 -0400
Date: Tue, 27 Oct 2015 14:39:39 +0000
From: Mark Rutland <mark.rutland@arm.com>
To: John Garry <john.garry@huawei.com>
Cc: JBottomley@odin.com, robh+dt@kernel.org, pawel.moll@arm.com,
        ijc+devicetree@hellion.org.uk, galak@codeaurora.org, arnd@arndb.de,
        linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org,
        devicetree@vger.kernel.org, linuxarm@huawei.com,
        john.garry2@mail.dcu.ie, hare@suse.de, xuwei5@hisilicon.com,
        zhangfei.gao@linaro.org
Subject: Re: [PATCH v2 02/32] devicetree: bindings: scsi: HiSi SAS
Message-ID: <20151027143939.GG3091@leverpostej>
References: <1445868903-183817-1-git-send-email-john.garry@huawei.com>
 <1445868903-183817-3-git-send-email-john.garry@huawei.com>
 <20151026144523.GB12277@leverpostej>
 <562F777B.6020407@huawei.com>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
In-Reply-To: <562F777B.6020407@huawei.com>
User-Agent: Mutt/1.5.21 (2010-09-15)
Sender: linux-kernel-owner@vger.kernel.org
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

On Tue, Oct 27, 2015 at 01:09:15PM +0000, John Garry wrote:
> On 26/10/2015 14:45, Mark Rutland wrote:
> >On Mon, Oct 26, 2015 at 10:14:33PM +0800, John Garry wrote:
> >>Add devicetree bindings for HiSilicon SAS driver.
> >>
> >>Signed-off-by: John Garry <john.garry@huawei.com>
> >>---
> >>  .../devicetree/bindings/scsi/hisilicon-sas.txt     | 70 ++++++++++++++++++++++
> >>  1 file changed, 70 insertions(+)
> >>  create mode 100644 Documentation/devicetree/bindings/scsi/hisilicon-sas.txt
> >>
> >>diff --git a/Documentation/devicetree/bindings/scsi/hisilicon-sas.txt b/Documentation/devicetree/bindings/scsi/hisilicon-sas.txt
> >>new file mode 100644
> >>index 0000000..d1e7b2a
> >>--- /dev/null
> >>+++ b/Documentation/devicetree/bindings/scsi/hisilicon-sas.txt
> >>@@ -0,0 +1,70 @@
> >>+* HiSilicon SAS controller
> >>+
> >>+The HiSilicon SAS controller supports SAS/SATA.
> >>+
> >>+Main node required properties:
> >>+  - compatible : value should be as follows:
> >>+	(a) "hisilicon,sas-controller-v1" for v1 of HiSilicon SAS controller IP
> >>+  - reg : Address and length of the SAS register
> >>+  - hisilicon,sas-syscon: phandle of syscon used for sas control
> >>+  - ctrl-reg : offset to the following SAS control registers (in order):
> >>+		- reset assert
> >>+		- clock disable
> >>+		- reset status
> >>+		- reset de-assert
> >>+		- clock enable
> >
> >This needs a better name, and it should probably be split up into
> >several properties.
> >
> >However, it sounds like the syscon is actually a clock+reset
> >controller, and should be modelled as such. It's not actually a part of
> >the SAS controller as such.
> 
> The syscon block is a general subsystem control block, and it is not
> specifically only for controlling reset and enabling clocks (other
> functions include serdes control, for example). It is also shared
> with other peripherals.
> 
> So we can remove the ctrl-reg property (since it is not part of the
> SAS controller), and add the relevant syscon register offsets to the
> "hisilicon,sas-syscon" property, like this:
> hisilicon,sas-syscon = <&sas_ctrl0 0xa60 0x33c 0x5a30 0xa64 0x338>;
> 
> Ok?

It would be better to have each offset in a separate property.

Mark.