From: Davidlohr Bueso <dave@stgolabs.net>
To: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@kernel.org>,
Thomas Gleixner <tglx@linutronix.de>,
"Paul E. McKenney" <paulmck@linux.vnet.ibm.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
the arch/x86 maintainers <x86@kernel.org>,
Davidlohr Bueso <dbueso@suse.de>
Subject: Re: [PATCH 3/4] x86,asm: Re-work smp_store_mb()
Date: Mon, 2 Nov 2015 17:36:25 -0800 [thread overview]
Message-ID: <20151103013625.GD1707@linux-uzut.site> (raw)
In-Reply-To: <CA+55aFynbkeuUGs9s-q+fLY6MeRBA6MjEyWWbbe7A5AaqsAknw@mail.gmail.com>
On Mon, 02 Nov 2015, Linus Torvalds wrote:
>On Mon, Nov 2, 2015 at 12:15 PM, Davidlohr Bueso <dave@stgolabs.net> wrote:
>>
>> So I ran some experiments on an IvyBridge (2.8GHz) and the cost of XCHG is
>> constantly cheaper (by at least half the latency) than MFENCE. While there
>> was a decent amount of variation, this difference remained rather constant.
>
>Mind testing "lock addq $0,0(%rsp)" instead of mfence? That's what we
>use on old cpu's without one (ie 32-bit).
I'm getting results very close to xchg.
>I'm not actually convinced that mfence is necessarily a good idea. I
>could easily see it being microcode, for example.
Interesting.
>
>At least on my Haswell, the "lock addq" is pretty much exactly half
>the cost of "mfence".
Ok, his coincides with my results on IvB.
next prev parent reply other threads:[~2015-11-03 1:36 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-27 19:53 [PATCH -tip 0/4] A few updates around smp_store_mb() Davidlohr Bueso
2015-10-27 19:53 ` [PATCH 1/4] arch,cmpxchg: Remove tas() definitions Davidlohr Bueso
2015-12-04 12:01 ` [tip:locking/core] locking/cmpxchg, arch: " tip-bot for Davidlohr Bueso
2015-10-27 19:53 ` [PATCH 2/4] arch,barrier: Use smp barriers in smp_store_release() Davidlohr Bueso
2015-10-27 20:03 ` Davidlohr Bueso
2015-12-04 12:01 ` [tip:locking/core] lcoking/barriers, arch: " tip-bot for Davidlohr Bueso
2015-10-27 19:53 ` [PATCH 3/4] x86,asm: Re-work smp_store_mb() Davidlohr Bueso
2015-10-27 21:33 ` Linus Torvalds
2015-10-27 22:01 ` Davidlohr Bueso
2015-10-27 22:37 ` Peter Zijlstra
2015-10-28 19:49 ` Davidlohr Bueso
2015-11-02 20:15 ` Davidlohr Bueso
2015-11-03 0:06 ` Linus Torvalds
2015-11-03 1:36 ` Davidlohr Bueso [this message]
2016-01-12 13:57 ` Michael S. Tsirkin
2016-01-12 17:20 ` Linus Torvalds
2016-01-12 17:45 ` Michael S. Tsirkin
2016-01-12 18:04 ` Linus Torvalds
2016-01-12 20:30 ` Andy Lutomirski
2016-01-12 20:54 ` Linus Torvalds
2016-01-12 20:59 ` Andy Lutomirski
2016-01-12 21:37 ` Linus Torvalds
2016-01-12 22:14 ` Michael S. Tsirkin
2016-01-13 16:20 ` Michael S. Tsirkin
2016-01-12 22:21 ` Michael S. Tsirkin
2016-01-12 22:55 ` H. Peter Anvin
2016-01-12 23:24 ` Linus Torvalds
2016-01-13 16:17 ` Borislav Petkov
2016-01-13 16:25 ` Michael S. Tsirkin
2016-01-13 16:33 ` Borislav Petkov
2016-01-13 16:42 ` Michael S. Tsirkin
2016-01-13 16:53 ` Borislav Petkov
2016-01-13 17:00 ` Michael S. Tsirkin
2016-01-13 18:38 ` Linus Torvalds
2015-10-27 19:53 ` [PATCH 4/4] doc,smp: Remove ambiguous statement in smp_store_mb() Davidlohr Bueso
2015-12-04 12:01 ` [tip:locking/core] locking/barriers, arch: Remove ambiguous statement in the smp_store_mb() documentation tip-bot for Davidlohr Bueso
2015-10-27 23:27 ` [PATCH 1/4] arch,cmpxchg: Remove tas() definitions David Howells
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