From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754578AbbK3TcT (ORCPT ); Mon, 30 Nov 2015 14:32:19 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:43695 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752271AbbK3TcR (ORCPT ); Mon, 30 Nov 2015 14:32:17 -0500 Date: Mon, 30 Nov 2015 11:32:16 -0800 From: Stephen Boyd To: Maxime Ripard Cc: Mike Turquette , Chen-Yu Tsai , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Subject: Re: [PATCH] clk: sunxi: pll2: Fix clock running too fast Message-ID: <20151130193216.GI11298@codeaurora.org> References: <1448897699-20475-1-git-send-email-maxime.ripard@free-electrons.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1448897699-20475-1-git-send-email-maxime.ripard@free-electrons.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11/30, Maxime Ripard wrote: > @@ -191,25 +186,17 @@ err_unmap: > iounmap(reg); > } > > -static struct sun4i_pll2_data sun4i_a10_pll2_data = { > - .pre_div_flags = CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO, > -}; > - > static void __init sun4i_a10_pll2_setup(struct device_node *node) > { > - sun4i_pll2_setup(node, &sun4i_a10_pll2_data); > + sun4i_pll2_setup(node, &sun4i_a10_pll2_data, 0); And it doesn't compile, because we just deleted the data that this is taking an address of. Hmph. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project