From: Andi Kleen <ak@linux.intel.com>
To: Stephane Eranian <eranian@google.com>
Cc: linux-kernel@vger.kernel.org, acme@redhat.com,
peterz@infradead.org, mingo@elte.hu, kan.liang@intel.com
Subject: Re: [PATCH v2 2/2] perf/x86: enable cycles:pp for Intel Atom
Date: Thu, 3 Dec 2015 12:14:55 -0800 [thread overview]
Message-ID: <20151203201455.GB18534@tassilo.jf.intel.com> (raw)
In-Reply-To: <1449172990-30183-3-git-send-email-eranian@google.com>
> /* INST_RETIRED.ANY_P, inv=1, cmask=16 (cycles:p). */
> INTEL_FLAGS_EVENT_CONSTRAINT(0x108000c0, 0x01),
> + /* Allow all events as PEBS with no flags */
> + INTEL_ALL_EVENT_CONSTRAINT(0, 0x1),
I don't think this is really needed (no extra PEBS events), but ok it shouldn't
hurt either.
-Andi
--
ak@linux.intel.com -- Speaking for myself only
next prev parent reply other threads:[~2015-12-03 20:15 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-03 20:03 [PATCH v2 0/2] perf/x86: fixes and improvement for Intel Atom PEBS support Stephane Eranian
2015-12-03 20:03 ` [PATCH v2 1/2] perf/x86: fix PEBS and LBR issues on Intel Atom Stephane Eranian
2015-12-03 20:51 ` Peter Zijlstra
2015-12-03 21:19 ` Andi Kleen
2015-12-03 20:03 ` [PATCH v2 2/2] perf/x86: enable cycles:pp for " Stephane Eranian
2015-12-03 20:14 ` Andi Kleen [this message]
2015-12-03 21:44 ` Stephane Eranian
2016-01-06 18:52 ` [tip:perf/core] perf/x86: Enable " tip-bot for Stephane Eranian
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