From: Peter Zijlstra <peterz@infradead.org>
To: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>,
linux-kernel@vger.kernel.org, vince@deater.net,
eranian@google.com, Arnaldo Carvalho de Melo <acme@infradead.org>,
Mathieu Poirier <mathieu.poirier@linaro.org>
Subject: Re: [PATCH v0 3/5] perf: Introduce instruction trace filtering
Date: Fri, 11 Dec 2015 16:33:54 +0100 [thread overview]
Message-ID: <20151211153354.GY6356@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <87wpslatut.fsf@ashishki-desk.ger.corp.intel.com>
On Fri, Dec 11, 2015 at 05:27:22PM +0200, Alexander Shishkin wrote:
> Peter Zijlstra <peterz@infradead.org> writes:
>
> > On Fri, Dec 11, 2015 at 03:36:36PM +0200, Alexander Shishkin wrote:
> >> +static int perf_event_itrace_filters_setup(struct perf_event *event)
> >> +{
> >> + int ret;
> >> +
> >> + /*
> >> + * We can't use event_function_call() here, because that would
> >> + * require ctx::mutex, but one of our callers is called with
> >> + * mm::mmap_sem down, which would cause an inversion, see bullet
> >> + * (2) in put_event().
> >> + */
> >> + do {
> >> + if (READ_ONCE(event->state) != PERF_EVENT_STATE_ACTIVE) {
> >> + ret = event->pmu->itrace_filter_setup(event);
> >> + break;
> >
> > So this is tricky, if its not active it can be any moment, there is
> > nothing serializing against that.
>
> Indeed. But we should be able to call pmu::itrace_filter_setup()
> multiple times, so if after this we re-check that the event is still
> inactive, we can return, otherwise proceed with the cross-call. Does
> this make sense?
Dunno, I worry :-)
What if:
if (READ_ONCE(event->state) != PERF_EVENT_STATE_ACTIVE) {
// we were INACTIVE, but now the event gets scheduled in
// on _another_ CPU
event->pmu->itrace_filter_setup() := {
if (event->state == PERF_EVENT_STATE_ACTIVE) {
/* muck with hardware */
}
}
}
Here too I feel a strict validation vs programming split would make sense.
We can always call the validation thing, we must not call the program
thing !ACTIVE is a clear and simple rule.
next prev parent reply other threads:[~2015-12-11 15:33 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-11 13:36 [PATCH v0 0/5] perf: Introduce instruction trace filtering Alexander Shishkin
2015-12-11 13:36 ` [PATCH v0 1/5] perf: Move set_filter() from behind EVENT_TRACING Alexander Shishkin
2015-12-11 13:36 ` [PATCH v0 2/5] perf: Extend perf_event_aux() to optionally iterate through more events Alexander Shishkin
2015-12-11 13:36 ` [PATCH v0 3/5] perf: Introduce instruction trace filtering Alexander Shishkin
2015-12-11 14:02 ` Peter Zijlstra
2015-12-11 14:20 ` Alexander Shishkin
2015-12-11 14:23 ` Mark Rutland
2015-12-11 14:52 ` Peter Zijlstra
2015-12-11 15:12 ` Alexander Shishkin
2015-12-11 14:56 ` Peter Zijlstra
2015-12-11 15:14 ` Alexander Shishkin
2015-12-11 15:00 ` Peter Zijlstra
2015-12-11 15:17 ` Alexander Shishkin
2015-12-11 15:34 ` Peter Zijlstra
2015-12-11 16:06 ` Alexander Shishkin
2015-12-11 15:02 ` Peter Zijlstra
2015-12-11 15:20 ` Peter Zijlstra
2015-12-11 15:27 ` Alexander Shishkin
2015-12-11 15:33 ` Peter Zijlstra [this message]
2015-12-11 15:48 ` Alexander Shishkin
2015-12-11 16:01 ` Peter Zijlstra
2015-12-11 17:02 ` Peter Zijlstra
2015-12-11 15:09 ` Peter Zijlstra
2015-12-11 15:12 ` Peter Zijlstra
2015-12-11 15:28 ` Peter Zijlstra
2015-12-11 17:00 ` Peter Zijlstra
2015-12-11 17:13 ` Alexander Shishkin
2015-12-11 22:39 ` Peter Zijlstra
2015-12-11 16:59 ` Peter Zijlstra
2015-12-11 17:15 ` Alexander Shishkin
2015-12-11 18:11 ` Mathieu Poirier
2015-12-11 22:41 ` Peter Zijlstra
2015-12-11 13:36 ` [PATCH v0 4/5] perf/x86/intel/pt: IP filtering register/cpuid bits Alexander Shishkin
2015-12-11 13:36 ` [PATCH v0 5/5] perf/x86/intel/pt: Add support for instruction trace filtering in PT Alexander Shishkin
2015-12-11 18:06 ` Mathieu Poirier
2015-12-11 21:38 ` [PATCH v0 0/5] perf: Introduce instruction trace filtering Mathieu Poirier
2015-12-14 8:50 ` Alexander Shishkin
2015-12-15 0:25 ` Mathieu Poirier
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