From: Peter Zijlstra <peterz@infradead.org>
To: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ingo Molnar <mingo@redhat.com>,
linux-kernel@vger.kernel.org, vince@deater.net,
eranian@google.com, Arnaldo Carvalho de Melo <acme@infradead.org>,
Mathieu Poirier <mathieu.poirier@linaro.org>
Subject: Re: [PATCH v0 3/5] perf: Introduce instruction trace filtering
Date: Fri, 11 Dec 2015 17:01:36 +0100 [thread overview]
Message-ID: <20151211160136.GA6356@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <87si39aswc.fsf@ashishki-desk.ger.corp.intel.com>
On Fri, Dec 11, 2015 at 05:48:03PM +0200, Alexander Shishkin wrote:
> > We can always call the validation thing, we must not call the program
> > thing !ACTIVE is a clear and simple rule.
>
> Ah, but pmu::itrace_filter_setup() does not touch the hardware,
> pmu::start() does. The former keeps an array of, say, MSR values ready
> for programming in event::hw and the latter actually writes the MSRs. So
> the above example should not be a problem.
>
> So in a way validation and programming are split already. And PT, for
> example, won't have it any other way, you can only program stuff into
> the registers while tracing is disabled.
Yes, I just read that in the last patch. If however we fold the whole
stop/start bits into it, that fails again.
Hmm.. lemme ponder a bit.
next prev parent reply other threads:[~2015-12-11 16:01 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-12-11 13:36 [PATCH v0 0/5] perf: Introduce instruction trace filtering Alexander Shishkin
2015-12-11 13:36 ` [PATCH v0 1/5] perf: Move set_filter() from behind EVENT_TRACING Alexander Shishkin
2015-12-11 13:36 ` [PATCH v0 2/5] perf: Extend perf_event_aux() to optionally iterate through more events Alexander Shishkin
2015-12-11 13:36 ` [PATCH v0 3/5] perf: Introduce instruction trace filtering Alexander Shishkin
2015-12-11 14:02 ` Peter Zijlstra
2015-12-11 14:20 ` Alexander Shishkin
2015-12-11 14:23 ` Mark Rutland
2015-12-11 14:52 ` Peter Zijlstra
2015-12-11 15:12 ` Alexander Shishkin
2015-12-11 14:56 ` Peter Zijlstra
2015-12-11 15:14 ` Alexander Shishkin
2015-12-11 15:00 ` Peter Zijlstra
2015-12-11 15:17 ` Alexander Shishkin
2015-12-11 15:34 ` Peter Zijlstra
2015-12-11 16:06 ` Alexander Shishkin
2015-12-11 15:02 ` Peter Zijlstra
2015-12-11 15:20 ` Peter Zijlstra
2015-12-11 15:27 ` Alexander Shishkin
2015-12-11 15:33 ` Peter Zijlstra
2015-12-11 15:48 ` Alexander Shishkin
2015-12-11 16:01 ` Peter Zijlstra [this message]
2015-12-11 17:02 ` Peter Zijlstra
2015-12-11 15:09 ` Peter Zijlstra
2015-12-11 15:12 ` Peter Zijlstra
2015-12-11 15:28 ` Peter Zijlstra
2015-12-11 17:00 ` Peter Zijlstra
2015-12-11 17:13 ` Alexander Shishkin
2015-12-11 22:39 ` Peter Zijlstra
2015-12-11 16:59 ` Peter Zijlstra
2015-12-11 17:15 ` Alexander Shishkin
2015-12-11 18:11 ` Mathieu Poirier
2015-12-11 22:41 ` Peter Zijlstra
2015-12-11 13:36 ` [PATCH v0 4/5] perf/x86/intel/pt: IP filtering register/cpuid bits Alexander Shishkin
2015-12-11 13:36 ` [PATCH v0 5/5] perf/x86/intel/pt: Add support for instruction trace filtering in PT Alexander Shishkin
2015-12-11 18:06 ` Mathieu Poirier
2015-12-11 21:38 ` [PATCH v0 0/5] perf: Introduce instruction trace filtering Mathieu Poirier
2015-12-14 8:50 ` Alexander Shishkin
2015-12-15 0:25 ` Mathieu Poirier
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