From: Boris Brezillon <boris.brezillon@free-electrons.com>
To: Milo Kim <milo.kim@ti.com>
Cc: <tglx@linutronix.de>, <jason@lakedaemon.net>,
<marc.zyngier@arm.com>, <alexandre.belloni@free-electrons.com>,
<ludovic.desroches@atmel.com>, <nicolas.ferre@atmel.com>,
<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 08/19] irqchip: atmel-aic: add common mask and unmask functions
Date: Mon, 4 Jan 2016 09:48:28 +0100 [thread overview]
Message-ID: <20160104094828.2664b044@bbrezillon> (raw)
In-Reply-To: <1451881723-2478-9-git-send-email-milo.kim@ti.com>
On Mon, 4 Jan 2016 13:28:32 +0900
Milo Kim <milo.kim@ti.com> wrote:
> AIC has one register access to enable/disable an interrupt.
> AIC5 requires two register accesses - SSR and IECR/IDCR.
> This patch unifies interrupt mask and unmask operations.
>
> Mask and unmask operations are moved into aic_common_of_init().
> AIC5 can have multiple IRQ chips, mask/unmask should be assigned per chip.
> In case of AIC, it's also good because AIC has one IRQ chip.
> So looping count is just one time to configure mask/unmask functions.
>
> struct irq_domain *__init aic_common_of_init(struct device_node *node,
> const char *name, int nirqs)
> {
> ...
>
> for (i = 0; i < nchips; i++) {
> gc = irq_get_domain_generic_chip(domain, i * AIC_IRQS_PER_CHIP);
>
> ...
> gc->chip_types[0].chip.irq_mask = aic_mask;
> gc->chip_types[0].chip.irq_unmask = aic_unmask;
> gc->private = &aic[i];
> }
> }
>
> In AIC, register configuration for enabling and disabling IRQ can be
> replaced with irq_mask and irq_unmask. This is for using unified mask and
> unmask functions (aic_mask and aic_unmask).
>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: Jason Cooper <jason@lakedaemon.net>
> Cc: Marc Zyngier <marc.zyngier@arm.com>
> Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com>
> Cc: Boris BREZILLON <boris.brezillon@free-electrons.com>
> Cc: Ludovic Desroches <ludovic.desroches@atmel.com>
> Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
> Cc: linux-kernel@vger.kernel.org
> Signed-off-by: Milo Kim <milo.kim@ti.com>
> ---
> drivers/irqchip/irq-atmel-aic-common.c | 52 ++++++++++++++++++++++++++++++++++
> drivers/irqchip/irq-atmel-aic.c | 4 ---
> drivers/irqchip/irq-atmel-aic5.c | 36 -----------------------
> 3 files changed, 52 insertions(+), 40 deletions(-)
>
> diff --git a/drivers/irqchip/irq-atmel-aic-common.c b/drivers/irqchip/irq-atmel-aic-common.c
> index 94c9dad..533b3e9 100644
> --- a/drivers/irqchip/irq-atmel-aic-common.c
> +++ b/drivers/irqchip/irq-atmel-aic-common.c
> @@ -193,6 +193,56 @@ static void aic_common_shutdown(struct irq_data *d)
> ct->chip.irq_mask(d);
> }
>
> +static void aic_mask(struct irq_data *d)
> +{
> + struct irq_domain *domain = d->domain;
> + struct irq_chip_generic *bgc = irq_get_domain_generic_chip(domain, 0);
> + struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
> + u32 mask = d->mask;
> +
> + /*
> + * Disable interrupt. We always take the lock of the
> + * first irq chip as all chips share the same registers.
> + */
> + irq_gc_lock(bgc);
> +
> + if (aic_is_ssr_used()) {
> + irq_reg_writel(gc, d->hwirq, aic_reg_data->ssr);
> + irq_reg_writel(gc, 1, aic_reg_data->idcr);
> + } else {
> + irq_reg_writel(gc, mask, aic_reg_data->idcr);
> + }
> +
> + gc->mask_cache &= ~mask;
> +
> + irq_gc_unlock(bgc);
> +}
> +
> +static void aic_unmask(struct irq_data *d)
> +{
> + struct irq_domain *domain = d->domain;
> + struct irq_chip_generic *bgc = irq_get_domain_generic_chip(domain, 0);
> + struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
> + u32 mask = d->mask;
> +
> + /*
> + * Enable interrupt. We always take the lock of the
> + * first irq chip as all chips share the same registers.
> + */
> + irq_gc_lock(bgc);
> +
> + if (aic_is_ssr_used()) {
> + irq_reg_writel(gc, d->hwirq, aic_reg_data->ssr);
> + irq_reg_writel(gc, 1, aic_reg_data->iecr);
> + } else {
> + irq_reg_writel(gc, mask, aic_reg_data->iecr);
> + }
In other words, you prefer to add extra conditional statements in the
critical irq path rather than keeping two different drivers for two IPs
that are not so similar.
Here is my opinion: if you want to get rid of the aic-common* files,
fine, but please keep 2 different drivers for the AIC and AIC5 IPs and
duplicate the common code in each driver.
I understand that code factorization is important (and this is exactly
why I created aic-common), but it's pointless to try to factorize things
that are completely different, and AIC and AIC5 fall in this case (look
at the number of aic_is_ssr_used() you're adding in your series).
--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
next prev parent reply other threads:[~2016-01-04 8:48 UTC|newest]
Thread overview: 35+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-04 4:28 [PATCH 00/19] irqchip: atmel-aic: make unified AIC driver Milo Kim
2016-01-04 4:28 ` [PATCH 01/19] irqchip: atmel-aic: fix wrong bit operation for IRQ priority Milo Kim
2016-01-04 8:11 ` Boris Brezillon
2016-01-04 4:28 ` [PATCH 02/19] irqchip: atmel-aic: clean up RTC interrupt code Milo Kim
2016-01-04 8:16 ` Boris Brezillon
2016-01-04 4:28 ` [PATCH 03/19] irqchip: atmel-aic: clean up RTT " Milo Kim
2016-01-04 8:17 ` Boris Brezillon
2016-01-04 4:28 ` [PATCH 04/19] irqchip: atmel-aic: replace magic numbers with named constant Milo Kim
2016-01-04 8:29 ` Boris Brezillon
2016-01-04 4:28 ` [PATCH 05/19] irqchip: atmel-aic: use simple constant to get number of interrupts per chip Milo Kim
2016-01-04 8:33 ` Boris Brezillon
2016-01-04 4:28 ` [PATCH 06/19] irqchip: atmel-aic: introduce register data structure Milo Kim
2016-01-04 8:53 ` Boris Brezillon
2016-01-06 8:30 ` Milo Kim
2016-01-04 4:28 ` [PATCH 07/19] irqchip: atmel-aic: make common IRQ domain translate function Milo Kim
2016-01-04 4:28 ` [PATCH 08/19] irqchip: atmel-aic: add common mask and unmask functions Milo Kim
2016-01-04 8:48 ` Boris Brezillon [this message]
2016-01-04 4:28 ` [PATCH 09/19] irqchip: atmel-aic: add common retrigger function Milo Kim
2016-01-04 4:28 ` [PATCH 10/19] irqchip: atmel-aic: add common set_type function Milo Kim
2016-01-04 4:28 ` [PATCH 11/19] irqchip: atmel-aic: add common PM IRQ chip operation Milo Kim
2016-01-04 4:28 ` [PATCH 12/19] irqchip: atmel-aic: use EOI register data in aic_reg_data Milo Kim
2016-01-04 4:28 ` [PATCH 13/19] irqchip: atmel-aic: clean up irq_chip_generic Milo Kim
2016-01-04 4:28 ` [PATCH 14/19] irqchip: atmel-aic: add common HW init function Milo Kim
2016-01-04 4:28 ` [PATCH 15/19] irqchip: atmel-aic: add common interrupt handler Milo Kim
2016-01-04 4:28 ` [PATCH 16/19] irqchip: atmel-aic: get total number of IRQs from device node Milo Kim
2016-01-04 4:28 ` [PATCH 17/19] irqchip: atmel-aic: use unified IRQ chip initialization function Milo Kim
2016-01-04 4:28 ` [PATCH 18/19] irqchip: atmel-aic: use unified AIC driver Milo Kim
2016-01-04 4:28 ` [PATCH 19/19] irqchip: atmel-aic: rename AIC driver and fix Kconfig Milo Kim
2016-01-04 9:02 ` [PATCH 00/19] irqchip: atmel-aic: make unified AIC driver Boris Brezillon
2016-01-04 9:37 ` Nicolas Ferre
2016-01-06 7:55 ` Milo Kim
2016-01-06 7:48 ` Milo Kim
2016-01-06 9:07 ` Boris Brezillon
2016-01-06 14:49 ` Jason Cooper
2016-01-07 7:48 ` Milo Kim
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20160104094828.2664b044@bbrezillon \
--to=boris.brezillon@free-electrons.com \
--cc=alexandre.belloni@free-electrons.com \
--cc=jason@lakedaemon.net \
--cc=linux-kernel@vger.kernel.org \
--cc=ludovic.desroches@atmel.com \
--cc=marc.zyngier@arm.com \
--cc=milo.kim@ti.com \
--cc=nicolas.ferre@atmel.com \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox