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From: Peter Zijlstra <peterz@infradead.org>
To: "Suzuki K. Poulose" <Suzuki.Poulose@arm.com>
Cc: linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, mark.rutland@arm.com,
	punit.agrawal@arm.com, arm@kernel.org
Subject: Re: [PATCH v4 05/12] arm-cci: PMU: Add support for transactions
Date: Tue, 5 Jan 2016 15:53:19 +0100	[thread overview]
Message-ID: <20160105145319.GO6344@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <568BC882.70702@arm.com>

On Tue, Jan 05, 2016 at 01:43:30PM +0000, Suzuki K. Poulose wrote:
> On 05/01/16 13:37, Peter Zijlstra wrote:
> >On Mon, Dec 21, 2015 at 10:55:29AM +0000, Suzuki K. Poulose wrote:
> >>Thanks for that hint. Here is what I cam up with. We don't reschedule
> >>the events, all we need to do is group the writes to the counters. Hence
> >>we could as well add a flag for those events which need programming
> >>and perform the write in pmu::pmu_enable().
> >
> >I'm still somewhat confused..
> >
> >>Grouping the writes to counters can ammortise the cost of the operation
> >>on PMUs where it is expensive (e.g, CCI-500).
> >
> >This rationale makes me think you want to reduce the number of counter
> >writes, not batch them per-se.
> >
> >So why are you unconditionally writing all counters, instead of only
> >those that changed?
> >
> 
> The ARM CCI PMU reprograms all the counters with a specific value (2^31)
> to account for high interrupt latencies in recording the counters that
> overflowed. So, pmu_stop() updates the counter and pmu_start() resets
> the counter to the above value, always.
> 
> Now, writing to a single counter requires
> 
> 1) Stopping and disabling all the counters in HW (So that step 3 doesn't
> interfere with the other counters)
> 2) Program the target counter with invalid event and enable the counter.
> 3) Enable the PMU and then write to the counter.
> 4) Reset everything back to normal.
> 
> 
> So, the approach here is to delay the writes to the counters as much as possible
> and batch them. So that we don't have to repeat steps 1 & 4 for every single
> counter.
> 
> Does it help ?

Yes, thanks!

  reply	other threads:[~2016-01-05 14:53 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-17 17:49 [PATCHv4 00/12] arm-cci: PMU updates Suzuki K. Poulose
2015-12-17 17:49 ` [PATCH v4 01/12] arm-cci: Define CCI counter period Suzuki K. Poulose
2015-12-17 17:49 ` [PATCH v4 02/12] arm-cci: Refactor pmu_write_counter Suzuki K. Poulose
2015-12-17 17:49 ` [PATCH v4 03/12] arm-cci: Group writes to counter Suzuki K. Poulose
2015-12-17 17:49 ` [PATCH v4 04/12] arm-cci: Fix the flags for pmu_start called from pmu_add Suzuki K. Poulose
2015-12-17 17:49 ` [PATCH v4 05/12] arm-cci: PMU: Add support for transactions Suzuki K. Poulose
2015-12-17 18:42   ` Peter Zijlstra
2015-12-18 10:28     ` Suzuki K. Poulose
2015-12-18 10:42       ` Peter Zijlstra
2015-12-18 10:58         ` Suzuki K. Poulose
2015-12-18 11:47           ` Peter Zijlstra
2015-12-21 10:55             ` Suzuki K. Poulose
2016-01-05 13:37               ` Peter Zijlstra
2016-01-05 13:43                 ` Suzuki K. Poulose
2016-01-05 14:53                   ` Peter Zijlstra [this message]
2015-12-17 17:49 ` [PATCH v4 06/12] arm-cci: Refactor CCI PMU enable/disable methods Suzuki K. Poulose
2015-12-17 17:49 ` [PATCH v4 07/12] arm-cci: Get the status of a counter Suzuki K. Poulose
2015-12-17 17:49 ` [PATCH v4 08/12] arm-cci: Add routines to save/restore all counters Suzuki K. Poulose
2015-12-17 17:49 ` [PATCH v4 09/12] arm-cci: Provide hook for writing to PMU counters Suzuki K. Poulose
2015-12-17 17:49 ` [PATCH v4 10/12] arm-cci: CCI-500: Work around PMU counter writes Suzuki K. Poulose
2015-12-17 17:49 ` [PATCH v4 11/12] arm-cci500: Rearrange PMU driver for code sharing with CCI-550 PMU Suzuki K. Poulose
2015-12-17 17:49 ` [PATCH v4 12/12] arm-cci: CoreLink CCI-550 PMU driver Suzuki K. Poulose

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