From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752192AbcAFVD2 (ORCPT ); Wed, 6 Jan 2016 16:03:28 -0500 Received: from down.free-electrons.com ([37.187.137.238]:59218 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751862AbcAFVD0 (ORCPT ); Wed, 6 Jan 2016 16:03:26 -0500 Date: Wed, 6 Jan 2016 22:03:24 +0100 From: Maxime Ripard To: Arnd Bergmann Cc: Andre Przywara , Chen-Yu Tsai , marc.zyngier@arm.com, catalin.marinas@arm.com, will.deacon@arm.com, linux-sunxi@googlegroups.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [RFC PATCH 5/5] arm64: Introduce Allwinner SoC config option Message-ID: <20160106210324.GB9631@lukather> References: <1450787267-26836-1-git-send-email-andre.przywara@arm.com> <1450787267-26836-6-git-send-email-andre.przywara@arm.com> <20160104112648.GD11722@lukather> <12966735.VQfHhlD3ne@wuerfel> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="oC1+HKm2/end4ao3" Content-Disposition: inline In-Reply-To: <12966735.VQfHhlD3ne@wuerfel> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --oC1+HKm2/end4ao3 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi Arnd, On Mon, Jan 04, 2016 at 01:12:53PM +0100, Arnd Bergmann wrote: > On Monday 04 January 2016 12:26:48 Maxime Ripard wrote: > > Hi Andre, Arnd, > >=20 > > On Tue, Dec 22, 2015 at 12:27:47PM +0000, Andre Przywara wrote: > > > To prepare for supporting the Allwinner A64 SoC, introduce a config > > > option to allow compiling Allwinner (aka. sunxi) specific drivers > > > for ARM64. > > > This patch just defines the ARCH_SUNXI symbol to allow Allwinner > > > specific drivers to be selected during kernel configuration. > > >=20 > > > Signed-off-by: Andre Przywara > >=20 > > I'm ok taking this patch. > >=20 > > I'm not quite sure how the process works though with arm64. Should I > > send a PR with this patch to Catalin, or does it go through the usual > > arm-soc maintainers? >=20 > We usually take these through arm-soc.=20 Ok. > > We should also probably extend the MAINTAINERS entry, shouldn't we? > >=20 >=20 > A lot of the arm64 changes get sent to arm-soc from random developers that > are not in the MAINTAINERS file at the moment, and I'd like to reduce > that, so please pick up whatever arm64 sunxi changes you see that look ok > and send a separate pull request as you do for arm32. Sending patches > separately is fine too, but I'd like to see them come from you to arm@ker= nel.org > so I don't need to guess whether we should pick them up or not. >=20 > This time around, we have two arm64 branches, one for boot/dts and one > combined for Kconfig and defconfig (MAINTAINERS can also go in there). We > are still experimenting with that model though, and it may change in > the future. Understood. Thanks a lot! Maxime --=20 Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com --oC1+HKm2/end4ao3 Content-Type: application/pgp-signature; name="signature.asc" Content-Description: Digital signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAEBAgAGBQJWjYEcAAoJEBx+YmzsjxAgwqUP/jRzaSk8AabgS1wilouYf7Ct awXc1r6322l0JHe/GIIGJi0tCUW9GdfJYJpnnR16WMQiESpEAWu0l0G7uZ/hjeCS e/EuBMU7Qoa0+C7yblup+VPDg5xAXa5VrGNUBPpMk5x24rbAC0EdEJUfmb3GL90z vznzWfYSOStCdmOR4m7Da4l5ahVmhFN9q+X2mW0rSInlkCfAv+6v/qknOQoHgCGS XhEqIQ5RDIXl1BIiR//zFWBboOBcSWqCjVqkaJ4P6Z7OAgRtrlps/ckQ8pQwMXB6 kAV0mUwcQqTyZk+mOuZOKVJ7kIk3l6iHDvQA5PTIMcnjP2zJ83YFYaXu2d9MRBIg oSE3eVhPT4AW39o4J/VRWaoLuirmOkwfB1opYiMruKwgWtquZV13/siejC8ghV0W /rvodkU+lU3aF2g8/LNUPT90EPM4noGF7Fx1YEmWulomLah1tKrZ7eydq64a/JrA oML/cKJXyaPA51lRWxJC9mkF9IJ0DpxfzsmlNfhRzvJhb4rwV+7hD+N+XYZZW3t+ uKeyreOBmfbLjnpPlvb3x2pJ+7NqK0SeYv7eLNxS9J6nrgY9dnUQ/6weDBWPvBec o3usC6VN4s7gvhSraL5nLb5l8qltDWBKdpHWlAn7bLKFoN691KS14PSljB/Fp4cv y8DJ2MaqUFI1Bsw60YMb =Nb87 -----END PGP SIGNATURE----- --oC1+HKm2/end4ao3--