From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756938AbcAJL0r (ORCPT ); Sun, 10 Jan 2016 06:26:47 -0500 Received: from mail.skyhub.de ([78.46.96.112]:35980 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756542AbcAJL0p (ORCPT ); Sun, 10 Jan 2016 06:26:45 -0500 Date: Sun, 10 Jan 2016 12:26:35 +0100 From: Borislav Petkov To: Tony Luck Cc: Dan Williams , Andy Lutomirski , linux-nvdimm , "linux-kernel@vger.kernel.org" , Andrew Morton , Robert , Ingo Molnar , "linux-mm@kvack.org" , X86 ML Subject: Re: [PATCH v8 3/3] x86, mce: Add __mcsafe_copy() Message-ID: <20160110112635.GC22896@pd.tnic> References: <19f6403f2b04d3448ed2ac958e656645d8b6e70c.1452297867.git.tony.luck@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Jan 09, 2016 at 05:40:05PM -0800, Tony Luck wrote: > BUT ... it's all going to be very messy. We don't have any CPUID > capability bits to say whether we support recovery, or which instructions > are good/bad choices for recovery. We can always define synthetic ones and set them after having checked MCA capability bits, f/m/s, etc., maybe even based on the list you're supplying... > Linux code recently got some recovery bits for AMD cpus ... I don't > know what the story is on which models support this, You mean this? /* * overflow_recov is supported for F15h Models 00h-0fh * even though we don't have a CPUID bit for it. */ if (c->x86 == 0x15 && c->x86_model <= 0xf) mce_flags.overflow_recov = 1; If so, that's just an improvement which makes MCi_STATUS[Overflow] MCEs non-fatal. -- Regards/Gruss, Boris. ECO tip #101: Trim your mails when you reply.