From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757482AbcAOLOy (ORCPT ); Fri, 15 Jan 2016 06:14:54 -0500 Received: from mail.skyhub.de ([78.46.96.112]:36172 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1757250AbcAOLOw (ORCPT ); Fri, 15 Jan 2016 06:14:52 -0500 Date: Fri, 15 Jan 2016 12:14:35 +0100 From: Borislav Petkov To: Aravind Gopalakrishnan Cc: tony.luck@intel.com, tglx@linutronix.de, mingo@redhat.com, hpa@zytor.com, x86@kernel.org, linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 3/5] x86/mcheck/AMD: Reduce number of blocks scanned per bank Message-ID: <20160115111435.GE25104@pd.tnic> References: <1452809140-3328-1-git-send-email-Aravind.Gopalakrishnan@amd.com> <1452809140-3328-4-git-send-email-Aravind.Gopalakrishnan@amd.com> <20160114223739.GJ19941@pd.tnic> <569825B6.6020507@amd.com> <20160114225359.GL19941@pd.tnic> <56982A6E.10000@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <56982A6E.10000@amd.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jan 14, 2016 at 05:08:30PM -0600, Aravind Gopalakrishnan wrote: > In the same manner, we'd still have to know the last possible MISC > register for future processors.. I was going to suggest that we should probably *count* the MISC registers upfront so that we know exactly how many are we dealing with instead of relying on macros but that would be overengineering it for no good reason. And we're checking the valid bits and so on, so we're good. So ok, I'm persuaded. Thanks. -- Regards/Gruss, Boris. ECO tip #101: Trim your mails when you reply.