From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758311AbcATIsG (ORCPT ); Wed, 20 Jan 2016 03:48:06 -0500 Received: from down.free-electrons.com ([37.187.137.238]:60145 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751144AbcATIr5 (ORCPT ); Wed, 20 Jan 2016 03:47:57 -0500 Date: Wed, 20 Jan 2016 09:47:54 +0100 From: Thomas Petazzoni To: Jisheng Zhang Cc: , , , , , , , , , , , Subject: Re: [PATCH 2/4] net: mvneta: Try to get named core clock first Message-ID: <20160120094754.316390b5@free-electrons.com> In-Reply-To: <1453277183-5412-3-git-send-email-jszhang@marvell.com> References: <1453277183-5412-1-git-send-email-jszhang@marvell.com> <1453277183-5412-3-git-send-email-jszhang@marvell.com> Organization: Free Electrons X-Mailer: Claws Mail 3.12.0 (GTK+ 2.24.28; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Dear Jisheng Zhang, On Wed, 20 Jan 2016 16:06:21 +0800, Jisheng Zhang wrote: > Some platforms may provide more than one clk for the mvneta IP, for > example Marvell BG4CT provides "core" clk for the mac core, and "axi" > clk for the AXI bus logic. > > To support for more than one clock, we'll need to distinguish between > the clock by name. Change clock probing to first try to get "core" > clock before falling back to unnamed clock. > > Signed-off-by: Jisheng Zhang > --- > drivers/net/ethernet/marvell/mvneta.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) Acked-by: Thomas Petazzoni Thanks, Thomas -- Thomas Petazzoni, CTO, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com