From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758415AbcATJzi (ORCPT ); Wed, 20 Jan 2016 04:55:38 -0500 Received: from userp1040.oracle.com ([156.151.31.81]:25125 "EHLO userp1040.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751144AbcATJzf (ORCPT ); Wed, 20 Jan 2016 04:55:35 -0500 Date: Wed, 20 Jan 2016 12:54:51 +0300 From: Dan Carpenter To: Doug Thompson , Borislav Petkov Cc: Mauro Carvalho Chehab , linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org, kernel-janitors@vger.kernel.org Subject: [patch] amd64_edac: shift wrapping issue in f1x_get_norm_dct_addr() Message-ID: <20160120095451.GB19898@mwanda> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline User-Agent: Mutt/1.5.24 (2015-08-30) X-Source-IP: aserv0021.oracle.com [141.146.126.233] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org dct_sel_base_off is declared as a u64 but we're only using the lower 32 bits because of a shift wrapping bug. Fixes: c8e518d5673d ('amd64_edac: Sanitize f10_get_base_addr_offset') Signed-off-by: Dan Carpenter --- Static checker stuff. Not tested. diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 9eee13e..d87a475 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c @@ -1452,7 +1452,7 @@ static u64 f1x_get_norm_dct_addr(struct amd64_pvt *pvt, u8 range, u64 chan_off; u64 dram_base = get_dram_base(pvt, range); u64 hole_off = f10_dhar_offset(pvt); - u64 dct_sel_base_off = (pvt->dct_sel_hi & 0xFFFFFC00) << 16; + u64 dct_sel_base_off = (u64)(pvt->dct_sel_hi & 0xFFFFFC00) << 16; if (hi_rng) { /*