From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S964799AbcATQid (ORCPT ); Wed, 20 Jan 2016 11:38:33 -0500 Received: from mail.kernel.org ([198.145.29.136]:43896 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934792AbcATQic (ORCPT ); Wed, 20 Jan 2016 11:38:32 -0500 Date: Wed, 20 Jan 2016 10:38:26 -0600 From: Rob Herring To: hs.liao@mediatek.com Cc: Matthias Brugger , Daniel Kurtz , Sascha Hauer , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, srv_heupstream@mediatek.com, Sascha Hauer , Philipp Zabel , Nicolas Boichat , CK HU Subject: Re: [RFC 1/3] dt-bindings: soc: Add documentation for the MediaTek GCE unit Message-ID: <20160120163826.GA23400@rob-hp-laptop> References: <1453266881-16849-1-git-send-email-hs.liao@mediatek.com> <1453266881-16849-2-git-send-email-hs.liao@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1453266881-16849-2-git-send-email-hs.liao@mediatek.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jan 20, 2016 at 01:14:38PM +0800, hs.liao@mediatek.com wrote: > From: HS Liao > > This adds documentation for the MediaTek Global Command Engine (GCE) unit > found in MT8173 SoCs. > > Signed-off-by: HS Liao > --- > .../devicetree/bindings/soc/mediatek/gce.txt | 33 ++++++++++++++++++++ > 1 file changed, 33 insertions(+) > create mode 100644 Documentation/devicetree/bindings/soc/mediatek/gce.txt > > diff --git a/Documentation/devicetree/bindings/soc/mediatek/gce.txt b/Documentation/devicetree/bindings/soc/mediatek/gce.txt > new file mode 100644 > index 0000000..878b11e > --- /dev/null > +++ b/Documentation/devicetree/bindings/soc/mediatek/gce.txt > @@ -0,0 +1,33 @@ > +MediaTek GCE > +=============== > + > +The Global Command Engine (GCE) is used to help read/write registers with > +critical time limitation, such as updating display configuration during the > +vblank. The GCE can be used to implement the Command Queue (CMDQ) driver. > +Currently, the GCE only supports display related hardwares, but we expect > +it can be extended to other hardwares for future requirements. That's a hardware limitation or just s/w is only using it for display? If the latter, that's not really relevant to this binding and should be removed. > + > +Required properties: > +- compatible: Must be "mediatek,mt8173-gce" > +- reg: Address range of the GCE unit > +- interrupts: The interrupt signal from the GCE block > +- clock: Clocks according to the common clock binding > +- clock-names: Must be "gce" to stand for GCE clock > + > +Example: > + > + gce: gce@10212000 { > + compatible = "mediatek,mt8173-gce"; > + reg = <0 0x10212000 0 0x1000>; > + interrupts = ; > + clocks = <&infracfg CLK_INFRA_GCE>; > + clock-names = "gce"; > + }; > + > + mmsys: clock-controller@14000000 { > + compatible = "mediatek,mt8173-mmsys", "syscon"; > + reg = <0 0x14000000 0 0x1000>; > + power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; > + #clock-cells = <1>; > + mediatek,gce = <&gce>; Not documented. > + }; > -- > 1.7.9.5 >