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From: Alban <albeu@free.fr>
To: Marc Zyngier <marc.zyngier@arm.com>
Cc: Aban Bedel <albeu@free.fr>, <linux-mips@linux-mips.org>,
	Ralf Baechle <ralf@linux-mips.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Alexander Couzens <lynxis@fe80.eu>,
	Joel Porquet <joel@porquet.org>,
	"Andrew Bresticker" <abrestic@chromium.org>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 6/6] MIPS: ath79: irq: Move the CPU IRQ driver to drivers/irqchip
Date: Wed, 20 Jan 2016 20:46:20 +0100	[thread overview]
Message-ID: <20160120204620.714636eb@tock> (raw)
In-Reply-To: <20160120124948.6917859f@sofa.wild-wind.fr.eu.org>

On Wed, 20 Jan 2016 12:49:48 +0000
Marc Zyngier <marc.zyngier@arm.com> wrote:

> On Tue, 17 Nov 2015 20:34:56 +0100
> Alban Bedel <albeu@free.fr> wrote:
> 
> > Signed-off-by: Alban Bedel <albeu@free.fr>
> > ---
> >  arch/mips/ath79/irq.c                    | 81
> > ++------------------------ arch/mips/include/asm/mach-ath79/ath79.h
> > |  1 + drivers/irqchip/Makefile                 |  1 +
> >  drivers/irqchip/irq-ath79-cpu.c          | 97
> > ++++++++++++++++++++++++++++++++ 4 files changed, 105
> > insertions(+), 75 deletions(-) create mode 100644
> > drivers/irqchip/irq-ath79-cpu.c
> >
 
 [...]

> > +asmlinkage void plat_irq_dispatch(void)
> > +{
> > +	unsigned long pending;
> > +	int irq;
> > +
> > +	pending = read_c0_status() & read_c0_cause() & ST0_IM;
> > +
> > +	if (!pending) {
> > +		spurious_interrupt();
> > +		return;
> > +	}
> > +
> > +	pending >>= CAUSEB_IP;
> > +	while (pending) {
> > +		irq = fls(pending) - 1;
> > +		if (irq < ARRAY_SIZE(irq_wb_chan) && irq_wb_chan[irq] != -1)
> > +			ath79_ddr_wb_flush(irq_wb_chan[irq]);
> > +		do_IRQ(MIPS_CPU_IRQ_BASE + irq);
> 
> I'm rather unfamiliar with the MIPS IRQ handling, but I'm vaguely
> surprised by the lack of domain. How do you unsure that the IRQ space
> used here doesn't clash with the one created in your "misc" irqchip?

This driver extend the irq-mips-cpu driver which take care of setting up
a legacy domain starting from MIPS_CPU_IRQ_BASE for these interrupts. I
don't find this very nice either, but this patch is about moving the
code out of arch/mips, so I tried to minimize unrelated changes.

Alban

  reply	other threads:[~2016-01-20 19:46 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-11-17 19:34 [PATCH 0/6] MIPS: ath79: Move the IRQ drivers to drivers/irqchip Alban Bedel
2015-11-17 19:34 ` [PATCH 1/6] MIPS: ath79: Fix the size of the MISC INTC registers in ar9132.dtsi Alban Bedel
2015-11-17 19:34 ` [PATCH 2/6] MIPS: ath79: irq: Remove useless #ifdef CONFIG_IRQCHIP Alban Bedel
2015-11-17 19:34 ` [PATCH 3/6] MIPS: ath79: irq: Prepare moving the MISC driver to drivers/irqchip Alban Bedel
2015-11-17 19:34 ` [PATCH 4/6] MIPS: ath79: irq: Move " Alban Bedel
2015-11-17 20:03   ` Jason Cooper
2015-11-17 20:06     ` Thomas Gleixner
2015-11-17 20:09       ` Jason Cooper
2015-12-30 13:53   ` Alban
2016-01-20  8:15     ` Alban
2016-01-20 12:38   ` Marc Zyngier
2016-01-20 19:51     ` Alban
2015-11-17 19:34 ` [PATCH 5/6] MIPS: ath79: Allow using ath79_ddr_wb_flush() from drivers Alban Bedel
2015-11-17 19:34 ` [PATCH 6/6] MIPS: ath79: irq: Move the CPU IRQ driver to drivers/irqchip Alban Bedel
2016-01-20 12:49   ` Marc Zyngier
2016-01-20 19:46     ` Alban [this message]
2016-01-21  8:52       ` Marc Zyngier

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