From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754001AbcAXQyy (ORCPT ); Sun, 24 Jan 2016 11:54:54 -0500 Received: from down.free-electrons.com ([37.187.137.238]:40500 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751644AbcAXQyt (ORCPT ); Sun, 24 Jan 2016 11:54:49 -0500 Date: Sun, 24 Jan 2016 17:54:47 +0100 From: Maxime Ripard To: Chen-Yu Tsai Cc: Ulf Hansson , Hans de Goede , "linux-mmc@vger.kernel.org" , linux-arm-kernel , linux-kernel , linux-sunxi Subject: Re: [PATCH RFC 08/15] ARM: dts: sun6i: Add mmc3 pins for 8 bit emmc Message-ID: <20160124165447.GA7908@lukather> References: <1453354002-28366-1-git-send-email-wens@csie.org> <1453354002-28366-9-git-send-email-wens@csie.org> <20160122203138.GB3682@lukather> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="pWyiEgJYm5f9v55/" Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --pWyiEgJYm5f9v55/ Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi, On Sat, Jan 23, 2016 at 07:04:54PM +0800, Chen-Yu Tsai wrote: > Hi, >=20 > On Sat, Jan 23, 2016 at 4:31 AM, Maxime Ripard > wrote: > > Hi, > > > > On Thu, Jan 21, 2016 at 01:26:35PM +0800, Chen-Yu Tsai wrote: > >> mmc2 and mmc3 are available on the same pins, with different mux value= s. > >> However, only mmc3 supports 8 bit DDR transfer modes. > >> > >> Since preference for mmc3 over mmc2 is due to DDR transfer modes, just > >> set the drive strength to 40mA, which is needed for DDR. > >> > >> This pinmux setting also includes the hardware reset pin for emmc. > >> > >> Signed-off-by: Chen-Yu Tsai > >> --- > >> arch/arm/boot/dts/sun6i-a31.dtsi | 10 ++++++++++ > >> 1 file changed, 10 insertions(+) > >> > >> diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6= i-a31.dtsi > >> index b6ad7850fac6..1867af24ff52 100644 > >> --- a/arch/arm/boot/dts/sun6i-a31.dtsi > >> +++ b/arch/arm/boot/dts/sun6i-a31.dtsi > >> @@ -709,6 +709,16 @@ > >> allwinner,pull =3D ; > >> }; > >> > >> + mmc3_8bit_emmc_pins: mmc3@1 { > >> + allwinner,pins =3D "PC6", "PC7", "PC8", = "PC9", > >> + "PC10", "PC11", "PC12", > >> + "PC13", "PC14", "PC15", > >> + "PC24"; > >> + allwinner,function =3D "mmc3"; > >> + allwinner,drive =3D ; > >> + allwinner,pull =3D ; > >> + }; > >> + > > > > Is that reset pin optional? > > > > If so, I'd prefer it to be a separate node, like we're doing for the > > SPI chip selects for example. > > > > It allows more reusability between different devices without declaring > > new nodes. >=20 > All eMMC devices have a reset pin. The MMC standard specifies this as > one way to reset the card, others being a special reset command, or > powering the card off. It also notes a state when the card will not > accept commands, and will require a power cycle or asserting the reset > pin. >=20 > I assume all designs would route this pin. The FEX files also have this > pin included by default. I was more concerned about the case were you'd have a 8bits bus without an emmc. But I guess that can't happen, since all SD cards are using a 4 bits width anyway. I'll apply this patch. Thanks! Maxime --=20 Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com --pWyiEgJYm5f9v55/ Content-Type: application/pgp-signature; name="signature.asc" Content-Description: Digital signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAEBAgAGBQJWpQHXAAoJEBx+YmzsjxAg0B4P/2NqiIWP/3Esd/g0lHRm7JK7 FtANlZUvR0x9sUSQDRH4rZj//VYXIJj1ADJ7lEBNQLj1aoFrn6x/nP8UXT9JLeoq xl0Gjb9RsnwMCSAwIhMQx05Dzq0uHz9ATDjB3c+s9273mDn26J5MWtrtwfrwVOwL aigs8g7BSRKlJWC5LpSG8hMfaAoZUiq+wbN89ZNl+loWM4L/+FeZIXiJfyKd81C0 Dt39o23CBmgKVXTuf3aLTuwI0tzGhpM7pNQzrJIXCbrlEKGhKnG2qqQG2vo++2f4 nHCLwtni8ZfNoNNLdXh2+3GjP6c+bFdWXWrGxzgIwd0DyCEGrinqqIUUNRiAQg/x 6sSdHmZNAYQlIdpuMw4d+cK8SNE0z2DmRMi1IQgZT9Oy5MUIDmWiJtemY8VBhOYX PCEU52q7H3CVu/gsFTT233TTqBzea3z/66YsddTEm8LhlC/p7FJc9CF7vqmsywp4 X9+mrMOP9S42g4PuTaDKLVcsiwLP9tjqNxEsfZHUrhMt1/t5BSM08qNnb2CKvXMK sd7xwv40G0eHdeS3Wm/7QxH7GT8HvJHB4l6T8jhDdp3bFkA+A1qeUki6sGkSBAPt MzTmeqYU57lXwlzTHdywwU4ELAuYuTfZc8zpSNdobSyV8YMOVNR6JxTOOw8LnHuD 8J7YjWARQZoxb7LGQaOb =QhSM -----END PGP SIGNATURE----- --pWyiEgJYm5f9v55/--