From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757127AbcAYNub (ORCPT ); Mon, 25 Jan 2016 08:50:31 -0500 Received: from mx0b-001ae601.pphosted.com ([67.231.152.168]:44123 "EHLO mx0b-001ae601.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755405AbcAYNua (ORCPT ); Mon, 25 Jan 2016 08:50:30 -0500 Authentication-Results: ppops.net; spf=none smtp.mail=ckeepax@opensource.wolfsonmicro.com Date: Mon, 25 Jan 2016 13:49:53 +0000 From: Charles Keepax To: Mans Rullgard CC: Mark Brown , Liam Girdwood , Jaroslav Kysela , Takashi Iwai , , , Subject: Re: [PATCH] ASoC: wm8974: configure pll and mclk divider automatically Message-ID: <20160125134953.GK1490@localhost.localdomain> References: <1453725403-6261-1-git-send-email-mans@mansr.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: <1453725403-6261-1-git-send-email-mans@mansr.com> User-Agent: Mutt/1.5.23 (2014-03-12) X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 spamscore=0 suspectscore=0 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1507310008 definitions=main-1601250242 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jan 25, 2016 at 12:36:43PM +0000, Mans Rullgard wrote: > This adds a set_sysclk() DAI op so the card driver can set the > input clock frequency. If this is done, the pll and mclk divider > are configured to produce the required 256x fs clock when the > sample rate is set by hw_params(). > > These additions make the codec work with the simple-card driver. > Card drivers calling set_pll() and set_clkdiv() directly are > unaffected. > > Signed-off-by: Mans Rullgard > --- Acked-by: Charles Keepax Thanks, Charles