From: Rob Herring <robh@kernel.org>
To: j00310691 <john.garry@huawei.com>
Cc: JBottomley@odin.com, martin.petersen@oracle.com,
pawel.moll@arm.com, mark.rutland@arm.com,
ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
linuxarm@huawei.com, zhangfei.gao@linaro.org,
xuwei5@hisilicon.com, john.garry2@mail.dcu.ie,
linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org,
arnd@arndb.de, devicetree@vger.kernel.org
Subject: Re: [PATCH v2 01/23] devicetree: bindings: hisi_sas: add v2 HW bindings
Date: Mon, 25 Jan 2016 13:31:14 -0600 [thread overview]
Message-ID: <20160125193114.GA16531@rob-hp-laptop> (raw)
In-Reply-To: <1453742532-53092-2-git-send-email-john.garry@huawei.com>
On Tue, Jan 26, 2016 at 01:21:50AM +0800, j00310691 wrote:
> From: John Garry <john.garry@huawei.com>
>
> Add the dt bindings for HiSi SAS controller v2 HW.
>
> The main difference in the controller from dt perspective
> is interrupts. The v2 controller does not have dedicated
> fatal and broadcast interrupts - they are multiplexed on
> the channel interrupt.
>
> Each SAS v2 controller can issue upto 64 commands
> (or connection requests) on the system bus without waiting
> for a response - this is know as am-max-transmissions.
> In hip06, sas controller #1 has a limitation that it has to
> limit am-max-transmissions to 32 - this limitation is due
> to chip system bus design. It is not anticipated that any
> future chip incorporating v2 controller will have such a
> limitation.
>
> Signed-off-by: John Garry <john.garry@huawei.com>
> ---
> .../devicetree/bindings/scsi/hisilicon-sas.txt | 21 ++++++++++++++++++++-
> 1 file changed, 20 insertions(+), 1 deletion(-)
Acked-by: Rob Herring <robh@kernel.org>
next prev parent reply other threads:[~2016-01-25 19:31 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-25 17:21 [PATCH v2 00/23] HiSilicon SAS v2 hw support j00310691
2016-01-25 17:21 ` [PATCH v2 01/23] devicetree: bindings: hisi_sas: add v2 HW bindings j00310691
2016-01-25 19:31 ` Rob Herring [this message]
2016-01-25 17:21 ` [PATCH v2 02/23] hisi_sas: relocate DEV_IS_EXPANDER j00310691
2016-01-25 17:21 ` [PATCH v2 03/23] hisi_sas: set max commands as configurable j00310691
2016-01-25 17:21 ` [PATCH v2 04/23] hisi_sas: reduce max itct entries j00310691
2016-01-25 17:21 ` [PATCH v2 05/23] hisi_sas: add hisi_sas_err_record_v1 j00310691
2016-01-25 17:21 ` [PATCH v2 06/23] hisi_sas: rename some fields in hisi_sas_itct j00310691
2016-01-25 17:21 ` [PATCH v2 07/23] hisi_sas: add bare v2 hw driver j00310691
2016-01-25 17:21 ` [PATCH v2 08/23] hisi_sas: add v2 register definitions j00310691
2016-01-25 17:21 ` [PATCH v2 09/23] hisi_sas: add v2 hw init j00310691
2016-01-25 17:21 ` [PATCH v2 10/23] hisi_sas: add init_id_frame_v2_hw() j00310691
2016-01-25 17:22 ` [PATCH v2 11/23] hisi_sas: add v2 phy init code j00310691
2016-01-25 17:22 ` [PATCH v2 12/23] hisi_sas: add v2 int init and phy up handler j00310691
2016-01-25 17:22 ` [PATCH v2 13/23] hisi_sas: add v2 phy down handler j00310691
2016-01-25 17:22 ` [PATCH v2 14/23] hisi_sas: add v2 channel interrupt handler j00310691
2016-01-25 17:22 ` [PATCH v2 15/23] hisi_sas: add v2 SATA " j00310691
2016-01-25 17:22 ` [PATCH v2 16/23] hisi_sas: add v2 cq " j00310691
2016-01-25 17:22 ` [PATCH v2 17/23] hisi_sas: add v2 path to send ssp frame j00310691
2016-01-25 17:22 ` [PATCH v2 18/23] hisi_sas: add v2 code to send smp command j00310691
2016-01-25 17:22 ` [PATCH v2 19/23] hisi_sas: add v2 code for itct setup and free j00310691
2016-01-25 17:22 ` [PATCH v2 20/23] hisi_sas: add v2 path to send ATA command j00310691
2016-01-25 17:22 ` [PATCH v2 21/23] hisi_sas: add v2 slot error handler j00310691
2016-01-25 17:22 ` [PATCH v2 22/23] hisi_sas: add v2 tmf functions j00310691
2016-01-25 17:22 ` [PATCH v2 23/23] hisi_sas: update driver version to 1.1 j00310691
2016-01-25 17:24 ` [PATCH v2 00/23] HiSilicon SAS v2 hw support John Garry
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