From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752649AbcBHKoL (ORCPT ); Mon, 8 Feb 2016 05:44:11 -0500 Received: from down.free-electrons.com ([37.187.137.238]:60737 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752298AbcBHKoJ (ORCPT ); Mon, 8 Feb 2016 05:44:09 -0500 Date: Mon, 8 Feb 2016 11:44:07 +0100 From: Antoine Tenart To: Marc Zyngier Cc: Antoine Tenart , tglx@linutronix.de, jason@lakedaemon.net, tsahee@annapurnalabs.com, rshitrit@annapurnalabs.com, thomas.petazzoni@free-electrons.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 1/6] irqchip: add the Alpine MSIX interrupt controller Message-ID: <20160208104407.GB4117@kwain> References: <1454922971-17405-1-git-send-email-antoine.tenart@free-electrons.com> <1454922971-17405-2-git-send-email-antoine.tenart@free-electrons.com> <56B86391.1030609@arm.com> <20160208102656.GA4117@kwain> <56B86EA8.9070306@arm.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="ZoaI/ZTpAVc4A5k6" Content-Disposition: inline In-Reply-To: <56B86EA8.9070306@arm.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --ZoaI/ZTpAVc4A5k6 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Feb 08, 2016 at 10:32:08AM +0000, Marc Zyngier wrote: > On 08/02/16 10:26, Antoine Tenart wrote: > >>> +static int alpine_msix_init(struct device_node *node, > >>> + struct device_node *parent) > >>> +{ > >>> + struct alpine_msix_data *priv; > >>> + struct resource res; > >>> + int ret; > >>> + > >>> + priv =3D kzalloc(sizeof(*priv), GFP_KERNEL); > >>> + if (!priv) > >>> + return -ENOMEM; > >>> + > >>> + spin_lock_init(&priv->msi_map_lock); > >>> + > >>> + ret =3D of_address_to_resource(node, 0, &res); > >>> + if (ret) { > >>> + pr_err("Failed to allocate resource\n"); > >>> + goto err_priv; > >>> + } > >>> + > >>> + priv->addr_high =3D upper_32_bits((u64)res.start); > >>> + priv->addr_low =3D lower_32_bits(res.start) + ALPINE_MSIX_SPI_TARGE= T_CLUSTER0; > >> > >> This is a bit odd. If you always set bit 16, why isn't that reflected = in > >> the base address coming from the DT? > >=20 > > The 20 least significant bits of addr_low provide direct information > > regarding the interrupt destination, so I thought it would be clearer > > to have this explicitly in the driver so that we know what those bits > > mean. >=20 > So what is this information? TARGET_CLUSTER0 is not very expressive, and > doesn't show what the alternatives are. Could you please elaborate a bit > on that front? For now lots of bits are reserved, so there aren't many alternatives. Bits [18:17] are used to set the GIC to which to route the MSI and bit 16 must be set when this target GIC is the primary GIC (bits [18:17] set to 0x0). There aren't other options available for now (that I'm aware of) for the target GIC configuration. Antoine --=20 Antoine T=E9nart, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com --ZoaI/ZTpAVc4A5k6 Content-Type: application/pgp-signature; name="signature.asc" Content-Description: Digital signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAEBCgAGBQJWuHF2AAoJEFxNi8it27zYUnAP/RNCZepQpeRcQaskExo+l0Pt l2e2paww1hL4aP2ubeX9OQnZvUMYzxP+MzPyuUMERQj8yDkc6EFAaR7Q1raziVoz WPwwo1W8eMc+etULdWkrehi/rt0BBqHaGvgAoOrmQZHCaha4IaQYcRmtV2i421u0 6wgo7LaZcSAm5OFZKXJ9f6IBbQ6uK0L3RkNh8eqSNzBybZAPoKv42tlfqDuUKlCc SpdRG3SHIUWqWmY3XQgx0kjk6+FFeQYxDDpr4xCnzhqtD16FvwGxHWpxbIVCV5Xu R01FD5vnGhPsOa6UV07W6xOXZMQYGW+u/H6uWzEahUknI3awzzKnJT+QGBc2B66P +DUDuzQHkCglIR+lRvTDfLmarS+OY1KXFfbaH6jMUisMMRVwQY2jgaISdo/dHzzh Z8tBDIqemTCCLuULRjnee4m6811pEaXkmqabtEi2g9KBPm9jYWPrf8wDulK0FOPK J5/Ha80WgTOUKqQ5DRFKSRQ+AcZxnm0urlZH01HXXhyQ0T35Avw6FZpSGOPfwSmw hCCnMGS3mDWWp3mXdEZSD0OTCRQC5Rr1JQ8V37HTCz1NKyTdAjQIl1ghiZ/ZpmTY O7PWzfpQvcpte++HdYYJDpy81EJ5RPFA9OpqMivECh0R4BK8ujTMyMusUQ7KFSXa b7tdgLyOgCiiCknArSng =447f -----END PGP SIGNATURE----- --ZoaI/ZTpAVc4A5k6--