From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752829AbcBJQRX (ORCPT ); Wed, 10 Feb 2016 11:17:23 -0500 Received: from mail-wm0-f43.google.com ([74.125.82.43]:36445 "EHLO mail-wm0-f43.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752144AbcBJQRV (ORCPT ); Wed, 10 Feb 2016 11:17:21 -0500 Date: Wed, 10 Feb 2016 16:17:16 +0000 From: Lee Jones To: Charles Keepax Cc: linux-kernel@vger.kernel.org, patches@opensource.wolfsonmicro.com Subject: Re: [PATCH RESEND 3/7] mfd: wm8998: Fix defaults array based on testing Message-ID: <20160210161716.GF3782@x1> References: <1455015123-20506-1-git-send-email-ckeepax@opensource.wolfsonmicro.com> <1455015123-20506-4-git-send-email-ckeepax@opensource.wolfsonmicro.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1455015123-20506-4-git-send-email-ckeepax@opensource.wolfsonmicro.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 09 Feb 2016, Charles Keepax wrote: > My automated test is back and now can check defaults against the actual > hardware. This patch updates the defaults array for the differences > detected and removes a couple of completely unused registers. > > Signed-off-by: Charles Keepax > --- > drivers/mfd/wm8998-tables.c | 12 ++---------- > 1 file changed, 2 insertions(+), 10 deletions(-) Applied, thanks. > diff --git a/drivers/mfd/wm8998-tables.c b/drivers/mfd/wm8998-tables.c > index 4c2dce77..a0de300 100644 > --- a/drivers/mfd/wm8998-tables.c > +++ b/drivers/mfd/wm8998-tables.c > @@ -229,8 +229,6 @@ static const struct reg_default wm8998_reg_default[] = { > { 0x00000174, 0x007D }, /* R372 - FLL1 Control 4 */ > { 0x00000175, 0x0004 }, /* R373 - FLL1 Control 5 */ > { 0x00000176, 0x0000 }, /* R374 - FLL1 Control 6 */ > - { 0x00000177, 0x0181 }, /* R375 - FLL1 Loop Filter Test 1 */ > - { 0x00000178, 0x0000 }, /* R376 - FLL1 NCO Test 0 */ > { 0x00000179, 0x0000 }, /* R377 - FLL1 Control 7 */ > { 0x00000181, 0x0000 }, /* R385 - FLL1 Synchroniser 1 */ > { 0x00000182, 0x0000 }, /* R386 - FLL1 Synchroniser 2 */ > @@ -247,8 +245,6 @@ static const struct reg_default wm8998_reg_default[] = { > { 0x00000194, 0x007D }, /* R404 - FLL2 Control 4 */ > { 0x00000195, 0x0004 }, /* R405 - FLL2 Control 5 */ > { 0x00000196, 0x0000 }, /* R406 - FLL2 Control 6 */ > - { 0x00000197, 0x0000 }, /* R407 - FLL2 Loop Filter Test 1 */ > - { 0x00000198, 0x0000 }, /* R408 - FLL2 NCO Test 0 */ > { 0x00000199, 0x0000 }, /* R409 - FLL2 Control 7 */ > { 0x000001A1, 0x0000 }, /* R417 - FLL2 Synchroniser 1 */ > { 0x000001A2, 0x0000 }, /* R418 - FLL2 Synchroniser 2 */ > @@ -320,7 +316,7 @@ static const struct reg_default wm8998_reg_default[] = { > { 0x00000434, 0x0000 }, /* R1076 - Output Path Config 5R */ > { 0x00000435, 0x0180 }, /* R1077 - DAC Digital Volume 5R */ > { 0x00000437, 0x0200 }, /* R1079 - Noise Gate Select 5R */ > - { 0x00000440, 0x8FFF }, /* R1088 - DRE Enable */ > + { 0x00000440, 0x002F }, /* R1088 - DRE Enable */ > { 0x00000441, 0xC759 }, /* R1089 - DRE Control 1 */ > { 0x00000442, 0x2A08 }, /* R1089 - DRE Control 2 */ > { 0x00000443, 0x5CFA }, /* R1089 - DRE Control 3 */ > @@ -686,7 +682,7 @@ static const struct reg_default wm8998_reg_default[] = { > { 0x00000C10, 0x1000 }, /* R3088 - GPIO Debounce Config */ > { 0x00000C18, 0x0000 }, /* R3096 - GP Switch 1 */ > { 0x00000C20, 0x8002 }, /* R3104 - Misc Pad Ctrl 1 */ > - { 0x00000C21, 0x8001 }, /* R3105 - Misc Pad Ctrl 2 */ > + { 0x00000C21, 0x0001 }, /* R3105 - Misc Pad Ctrl 2 */ > { 0x00000C22, 0x0000 }, /* R3106 - Misc Pad Ctrl 3 */ > { 0x00000C23, 0x0000 }, /* R3107 - Misc Pad Ctrl 4 */ > { 0x00000C24, 0x0000 }, /* R3108 - Misc Pad Ctrl 5 */ > @@ -888,8 +884,6 @@ static bool wm8998_readable_register(struct device *dev, unsigned int reg) > case ARIZONA_FLL1_CONTROL_5: > case ARIZONA_FLL1_CONTROL_6: > case ARIZONA_FLL1_CONTROL_7: > - case ARIZONA_FLL1_LOOP_FILTER_TEST_1: > - case ARIZONA_FLL1_NCO_TEST_0: > case ARIZONA_FLL1_SYNCHRONISER_1: > case ARIZONA_FLL1_SYNCHRONISER_2: > case ARIZONA_FLL1_SYNCHRONISER_3: > @@ -906,8 +900,6 @@ static bool wm8998_readable_register(struct device *dev, unsigned int reg) > case ARIZONA_FLL2_CONTROL_5: > case ARIZONA_FLL2_CONTROL_6: > case ARIZONA_FLL2_CONTROL_7: > - case ARIZONA_FLL2_LOOP_FILTER_TEST_1: > - case ARIZONA_FLL2_NCO_TEST_0: > case ARIZONA_FLL2_SYNCHRONISER_1: > case ARIZONA_FLL2_SYNCHRONISER_2: > case ARIZONA_FLL2_SYNCHRONISER_3: -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog