From: Borislav Petkov <bp@alien8.de>
To: tthayer@opensource.altera.com
Cc: dougthompson@xmission.com, m.chehab@samsung.com,
robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com,
ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
linux@arm.linux.org.uk, dinguyen@opensource.altera.com,
grant.likely@linaro.org, devicetree@vger.kernel.org,
linux-doc@vger.kernel.org, linux-edac@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, tthayer.linux@gmail.com
Subject: Re: [PATCHv10 2/4] ARM: dts: Add Altera L2 Cache and OCRAM EDAC entries
Date: Thu, 11 Feb 2016 12:27:58 +0100 [thread overview]
Message-ID: <20160211112758.GA5565@pd.tnic> (raw)
In-Reply-To: <1455132384-17108-2-git-send-email-tthayer@opensource.altera.com>
On Wed, Feb 10, 2016 at 01:26:22PM -0600, tthayer@opensource.altera.com wrote:
> From: Thor Thayer <tthayer@opensource.altera.com>
>
> Adding the device tree entries and bindings needed to support
> the Altera L2 cache and On-Chip RAM EDAC. This patch relies upon
> an earlier patch to declare and setup On-chip RAM properly.
> http://www.spinics.net/lists/devicetree/msg51117.html
For the future, please use git commit IDs and not some, probably
unstable URLs:
8b907c8b62ac ("arm: dts: socfpga: Add OCRAM node")
I've fixed it now while applying.
--
Regards/Gruss,
Boris.
ECO tip #101: Trim your mails when you reply.
next prev parent reply other threads:[~2016-02-11 11:28 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-10 19:26 [PATCHv10 1/4] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support tthayer
2016-02-10 19:26 ` [PATCHv10 2/4] ARM: dts: Add Altera L2 Cache and OCRAM EDAC entries tthayer
2016-02-11 11:27 ` Borislav Petkov [this message]
2016-02-10 19:26 ` [PATCHv10 3/4] ARM: socfpga: enable L2 cache ECC on startup tthayer
2016-02-10 19:26 ` [PATCHv10 4/4] ARM: socfpga: Enable OCRAM " tthayer
2016-02-11 11:35 ` [PATCHv10 1/4] EDAC, altera: Add Altera L2 Cache and OCRAM EDAC Support Borislav Petkov
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