RE: [PATCH 0/4] MSR: MSR: MSR Whitelist and Batch Introduction

Mcfadden, Marty Jay
2016-02-28T18:54:52Z

> * Ingo Molnar [mailto:mingo.kernel.org@gmail.com] wrote:
>
> No, we really don't want to touch the old MSR code - it's a very opaque API with
> various deep limitations.
>
> What I'd like to see instead is to use a modern system monitoring interface - and
> in fact that already happened in the last kernel release, we added the perf MSR
> access methods via:
>
> commit b7b7c7821d932ba18ef6c8eafc8536066b4c2ef4
> Author: Andy Lutomirski <luto@kernel.org>
> Date: Mon Jul 20 11:49:06 2015 -0400
>
> perf/x86: Add an MSR PMU driver
>
> This patch adds an MSR PMU to support free running MSR counters. Such
> as time and freq related counters includes TSC, IA32_APERF, IA32_MPERF
> and IA32_PPERF, but also SMI_COUNT.
>
> The events are exposed in sysfs for use by perf stat and other tools.
> The files are under /sys/devices/msr/events/
>

Thank you Ingo,

Our use case for MSR access is different. In addition to being able to
access free running MSR counters, we also need to monitor (read) and
adjust (write) MSRs that may modify running system configurations.
One example set of MSRs that we need to be able to access are
associated with RAPL.

Further, system administrators need the ability to grant/deny MSR read
and/or write access at bit-level granularity for some of the MSRs in order
to maintain imposed security policies for their respective deployments.
The proposed whitelist approach allows for system administrators to set
a bit mask for the bits in each register where access is to be granted.

The cgroup management does not provide this level of granularity.
Instead it allows for an administrator to give a mode of access to either
all MSRs or none of them.

Thanks again,

Marty