From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756620AbcB0OsV (ORCPT ); Sat, 27 Feb 2016 09:48:21 -0500 Received: from bombadil.infradead.org ([198.137.202.9]:48648 "EHLO bombadil.infradead.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756331AbcB0OsU (ORCPT ); Sat, 27 Feb 2016 09:48:20 -0500 Date: Sat, 27 Feb 2016 15:48:09 +0100 From: Peter Zijlstra To: Jiri Olsa Cc: Arnaldo Carvalho de Melo , Ingo Molnar , Andi Kleen , Stephane Eranian , Wang Nan , zheng.z.yan@intel.com, Kan Liang , LKML Subject: Re: [BUG] Core2 cpu triggers hard lockup with perf test Message-ID: <20160227144809.GC6356@twins.programming.kicks-ass.net> References: <20160227123636.GB30858@krava.redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20160227123636.GB30858@krava.redhat.com> User-Agent: Mutt/1.5.21 (2012-12-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Feb 27, 2016 at 01:37:01PM +0100, Jiri Olsa wrote: > we are getting hard lockups on Core2 cpus (model 23) > I can't find what's special about Core2 CPU PEBS setup, > it seems that oher CPUs are ok (tried on ivb/snb/hsw). > > reverting the 156174999dd1 fixed the issue for me > > ideas? thanks, The obvious difference between Core2 and later chips is that Core2 only has PEBS on a single counter (cnt0). I'll try and have a closer look on Monday, I should still have a Core2 class machine around the house somewhere.