From: Peter Zijlstra <peterz@infradead.org>
To: Jiri Olsa <jolsa@redhat.com>
Cc: Andi Kleen <andi@firstfloor.org>,
"Liang, Kan" <kan.liang@intel.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Ingo Molnar <mingo@kernel.org>,
Stephane Eranian <eranian@google.com>,
Wang Nan <wangnan0@huawei.com>,
"zheng.z.yan@intel.com" <zheng.z.yan@intel.com>,
LKML <linux-kernel@vger.kernel.org>
Subject: Re: [BUG] Core2 cpu triggers hard lockup with perf test
Date: Tue, 1 Mar 2016 19:14:04 +0100 [thread overview]
Message-ID: <20160301181404.GA6356@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <20160301180440.GA6769@krava.redhat.com>
On Tue, Mar 01, 2016 at 07:04:40PM +0100, Jiri Olsa wrote:
> > That's the PERF_GLOBAL_CTRL, right? But it must have succeeded,
>
> yep, should be this one:
>
> static void __intel_pmu_enable_all(int added, bool pmi)
> {
> struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events);
>
> intel_pmu_pebs_enable_all();
> intel_pmu_lbr_enable_all(pmi);
> >>> wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL,
> x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_guest_mask);
>
>
> > otherwise the NMI watchdog would never have fired.
>
> so NMI wouldn't trigger if CPU is inside wrmsr?
Well, anything goes with MSR writes, that's all a magic heap of
micro-code.
But at the very least it did actually enable the counters, otherwise the
counter used for the NMI watchdog could not fire, it too would still be
disabled.
next prev parent reply other threads:[~2016-03-01 18:14 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-27 12:37 [BUG] Core2 cpu triggers hard lockup with perf test Jiri Olsa
2016-02-27 14:48 ` Peter Zijlstra
2016-02-27 15:46 ` Andi Kleen
2016-02-29 22:12 ` Liang, Kan
2016-03-01 6:55 ` Jiri Olsa
2016-03-01 9:17 ` Peter Zijlstra
2016-03-01 11:06 ` Jiri Olsa
2016-03-01 11:20 ` Peter Zijlstra
2016-03-01 14:51 ` Andi Kleen
2016-03-01 14:59 ` Peter Zijlstra
2016-03-01 17:17 ` Jiri Olsa
2016-03-01 17:32 ` Andi Kleen
2016-03-01 17:49 ` Peter Zijlstra
2016-03-01 18:04 ` Jiri Olsa
2016-03-01 18:14 ` Peter Zijlstra [this message]
2016-03-01 18:12 ` Peter Zijlstra
2016-03-01 19:03 ` [PATCH] perf x86: Use PAGE_SIZE for PEBS buffer size on Core2 Jiri Olsa
2016-03-08 13:15 ` [tip:perf/core] perf/x86/intel: " tip-bot for Jiri Olsa
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