[PATCH v4 1/2] gpu: host1x: Set DMA mask

[PATCH v4 1/2] gpu: host1x: Set DMA mask

[Alexandre Courbot]

The default DMA mask covers a 32 bits address range, but host1x devices
can address a larger range on TK1 and TX1. Set the DMA mask to the range
addressable when we use the IOMMU to prevent the use of bounce buffers.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
---
Change since v3:
- Use the IOMMU-addressable range (when IOMMU is available) for each host1x
  variation. This ensures that we can cover all physical memory while remaining
  conservative if IOMMU is not used.
- Set the DMA range on the host1x device itself so all its childs inherit from it

 drivers/gpu/host1x/dev.c | 7 +++++++
 drivers/gpu/host1x/dev.h | 1 +
 2 files changed, 8 insertions(+)

diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
index 314bf3718cc7..ff348690df94 100644
--- a/drivers/gpu/host1x/dev.c
+++ b/drivers/gpu/host1x/dev.c
@@ -23,6 +23,7 @@
 #include <linux/of_device.h>
 #include <linux/clk.h>
 #include <linux/io.h>
+#include <linux/dma-mapping.h>
 
 #define CREATE_TRACE_POINTS
 #include <trace/events/host1x.h>
@@ -68,6 +69,7 @@ static const struct host1x_info host1x01_info = {
 	.nb_bases	= 8,
 	.init		= host1x01_init,
 	.sync_offset	= 0x3000,
+	.dma_mask	= DMA_BIT_MASK(32),
 };
 
 static const struct host1x_info host1x02_info = {
@@ -77,6 +79,7 @@ static const struct host1x_info host1x02_info = {
 	.nb_bases = 12,
 	.init = host1x02_init,
 	.sync_offset = 0x3000,
+	.dma_mask = DMA_BIT_MASK(32),
 };
 
 static const struct host1x_info host1x04_info = {
@@ -86,6 +89,7 @@ static const struct host1x_info host1x04_info = {
 	.nb_bases = 64,
 	.init = host1x04_init,
 	.sync_offset = 0x2100,
+	.dma_mask = DMA_BIT_MASK(34),
 };
 
 static const struct host1x_info host1x05_info = {
@@ -95,6 +99,7 @@ static const struct host1x_info host1x05_info = {
 	.nb_bases = 64,
 	.init = host1x05_init,
 	.sync_offset = 0x2100,
+	.dma_mask = DMA_BIT_MASK(34),
 };
 
 static struct of_device_id host1x_of_match[] = {
@@ -148,6 +153,8 @@ static int host1x_probe(struct platform_device *pdev)
 	if (IS_ERR(host->regs))
 		return PTR_ERR(host->regs);
 
+	dma_set_mask_and_coherent(host->dev, host->info->dma_mask);
+
 	if (host->info->init) {
 		err = host->info->init(host);
 		if (err)
diff --git a/drivers/gpu/host1x/dev.h b/drivers/gpu/host1x/dev.h
index 0b6e8e9629c5..dace124994bb 100644
--- a/drivers/gpu/host1x/dev.h
+++ b/drivers/gpu/host1x/dev.h
@@ -96,6 +96,7 @@ struct host1x_info {
 	int	nb_mlocks;		/* host1x: number of mlocks */
 	int	(*init)(struct host1x *); /* initialize per SoC ops */
 	int	sync_offset;
+	u64	dma_mask;		/* mask of addressable memory */
 };
 
 struct host1x {
-- 
2.7.1

[PATCH v4 2/2] gpu: host1x: Set DMA ops on device creation

[Alexandre Courbot]

Currently host1x-instanciated devices have their dma_ops left to NULL,
which makes any DMA operation (like buffer import) on ARM64 fallback
to the dummy_dma_ops and fail with an error.

This patch calls of_dma_configure() with the host1x node when creating
such a device, so the proper DMA operations are set.

Suggested-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
---
 drivers/gpu/host1x/bus.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/host1x/bus.c b/drivers/gpu/host1x/bus.c
index c2e7fba370bb..c27858ae0552 100644
--- a/drivers/gpu/host1x/bus.c
+++ b/drivers/gpu/host1x/bus.c
@@ -18,6 +18,7 @@
 #include <linux/host1x.h>
 #include <linux/of.h>
 #include <linux/slab.h>
+#include <linux/of_device.h>
 
 #include "bus.h"
 #include "dev.h"
@@ -396,6 +397,7 @@ static int host1x_device_add(struct host1x *host1x,
 	device->dev.coherent_dma_mask = host1x->dev->coherent_dma_mask;
 	device->dev.dma_mask = &device->dev.coherent_dma_mask;
 	dev_set_name(&device->dev, "%s", driver->driver.name);
+	of_dma_configure(&device->dev, host1x->dev->of_node);
 	device->dev.release = host1x_device_release;
 	device->dev.bus = &host1x_bus_type;
 	device->dev.parent = host1x->dev;
-- 
2.7.1

Re: [PATCH v4 1/2] gpu: host1x: Set DMA mask

[Thierry Reding]

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On Fri, Feb 26, 2016 at 06:06:52PM +0900, Alexandre Courbot wrote:
> The default DMA mask covers a 32 bits address range, but host1x devices
> can address a larger range on TK1 and TX1. Set the DMA mask to the range
> addressable when we use the IOMMU to prevent the use of bounce buffers.
> 
> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
> ---
> Change since v3:
> - Use the IOMMU-addressable range (when IOMMU is available) for each host1x
>   variation. This ensures that we can cover all physical memory while remaining
>   conservative if IOMMU is not used.
> - Set the DMA range on the host1x device itself so all its childs inherit from it
> 
>  drivers/gpu/host1x/dev.c | 7 +++++++
>  drivers/gpu/host1x/dev.h | 1 +
>  2 files changed, 8 insertions(+)

I think this could still be better, but what I have in mind is much more
involved and this does fix the issue with a minimum amount of code, so I
have applied this for now.

Thierry

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Re: [PATCH v4 2/2] gpu: host1x: Set DMA ops on device creation

[Thierry Reding]

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On Fri, Feb 26, 2016 at 06:06:53PM +0900, Alexandre Courbot wrote:
> Currently host1x-instanciated devices have their dma_ops left to NULL,
> which makes any DMA operation (like buffer import) on ARM64 fallback
> to the dummy_dma_ops and fail with an error.
> 
> This patch calls of_dma_configure() with the host1x node when creating
> such a device, so the proper DMA operations are set.
> 
> Suggested-by: Thierry Reding <thierry.reding@gmail.com>
> Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
> ---
>  drivers/gpu/host1x/bus.c | 2 ++
>  1 file changed, 2 insertions(+)

Applied, thanks.

Thierry

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