From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753903AbcCHEs3 (ORCPT ); Mon, 7 Mar 2016 23:48:29 -0500 Received: from mail-pf0-f172.google.com ([209.85.192.172]:36090 "EHLO mail-pf0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753231AbcCHEs2 (ORCPT ); Mon, 7 Mar 2016 23:48:28 -0500 Date: Tue, 8 Mar 2016 11:48:23 +0700 From: Lee Jones To: Andy Shevchenko Cc: linux-kernel@vger.kernel.org, Heikki Krogerus , Mika Westerberg Subject: Re: [PATCH v1 1/1] mfd: intel-lpss: save register context on suspend Message-ID: <20160308044823.GJ13692@x1> References: <1453808546-10897-1-git-send-email-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1453808546-10897-1-git-send-email-andriy.shevchenko@linux.intel.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 26 Jan 2016, Andy Shevchenko wrote: > From: Heikki Krogerus > > All configurations are lost and the registers will have > default values when the hardware is suspended and resumed, > so saving the private register space context on suspend, and > restoring it on resume. > > Fixes: 4b45efe85263 (mfd: Add support for Intel Sunrisepoint LPSS devices) I'd say this sumbission is more of a functional extention than a bug-fix. No real need for this statement. > Signed-off-by: Heikki Krogerus > Signed-off-by: Mika Westerberg Did it really take 2 of you to write this patch? > Signed-off-by: Andy Shevchenko > --- > drivers/mfd/intel-lpss.c | 19 ++++++++++++++++++- > 1 file changed, 18 insertions(+), 1 deletion(-) Code looks okay though: Acked-by: Lee Jones > diff --git a/drivers/mfd/intel-lpss.c b/drivers/mfd/intel-lpss.c > index 1743788..2a7c6a7 100644 > --- a/drivers/mfd/intel-lpss.c > +++ b/drivers/mfd/intel-lpss.c > @@ -34,6 +34,7 @@ > #define LPSS_DEV_SIZE 0x200 > #define LPSS_PRIV_OFFSET 0x200 > #define LPSS_PRIV_SIZE 0x100 > +#define LPSS_PRIV_REG_COUNT (LPSS_PRIV_SIZE / 4) > #define LPSS_IDMA64_OFFSET 0x800 > #define LPSS_IDMA64_SIZE 0x800 > > @@ -76,6 +77,7 @@ struct intel_lpss { > struct mfd_cell *cell; > struct device *dev; > void __iomem *priv; > + u32 priv_ctx[LPSS_PRIV_REG_COUNT]; > int devid; > u32 caps; > u32 active_ltr; > @@ -492,6 +494,16 @@ EXPORT_SYMBOL_GPL(intel_lpss_prepare); > > int intel_lpss_suspend(struct device *dev) > { > + struct intel_lpss *lpss = dev_get_drvdata(dev); > + unsigned int i; > + > + /* Save device context */ > + for (i = 0; i < LPSS_PRIV_REG_COUNT; i++) > + lpss->priv_ctx[i] = readl(lpss->priv + i * 4); > + > + /* Put the device into reset state */ > + writel(0, lpss->priv + LPSS_PRIV_RESETS); > + > return 0; > } > EXPORT_SYMBOL_GPL(intel_lpss_suspend); > @@ -499,8 +511,13 @@ EXPORT_SYMBOL_GPL(intel_lpss_suspend); > int intel_lpss_resume(struct device *dev) > { > struct intel_lpss *lpss = dev_get_drvdata(dev); > + unsigned int i; > > - intel_lpss_init_dev(lpss); > + intel_lpss_deassert_reset(lpss); > + > + /* Restore device context */ > + for (i = 0; i < LPSS_PRIV_REG_COUNT; i++) > + writel(lpss->priv_ctx[i], lpss->priv + i * 4); > > return 0; > } -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog