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Date: Sat, 12 Mar 2016 17:29:01 +0100
From: Ingo Molnar <mingo@kernel.org>
To: Fenghua Yu <fenghua.yu@intel.com>
Cc: "H. Peter Anvin" <hpa@linux.intel.com>, Ingo Molnar <mingo@elte.hu>,
        Thomas Gleixner <tglx@linutronix.de>,
        Ravi V Shankar <ravi.v.shankar@intel.com>,
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        "H. Peter Anvin" <hpa@zytor.com>,
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        Andy Lutomirski <luto@kernel.org>, Borislav Petkov <bp@alien8.de>
Subject: Re: [PATCH v3] x86/cpufeatures.h: Enable A Few New AVX-512 Features
Message-ID: <20160312162900.GA18808@gmail.com>
References: <1457667498-37357-1-git-send-email-fenghua.yu@intel.com>
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* Fenghua Yu <fenghua.yu@intel.com> wrote:

> +#define X86_FEATURE_AVX512DQ	( 9*32+17) /* AVX-512 DQ Instructions */
> +#define X86_FEATURE_AVX512BW	( 9*32+30) /* AVX-512 BW Instructions */
> +#define X86_FEATURE_AVX512VL	( 9*32+31) /* AVX-512 Vector Lengths */

Yeah, so I don't think it's obvious to people what the DQ/BW/VL extensions are 
precisely, so I changed the text to the following, a bit more verbose 
descriptions:

  #define X86_FEATURE_AVX512DQ  ( 9*32+17) /* AVX-512 DQ (Double/Quad granular) Instructions */
  #define X86_FEATURE_AVX512BW	( 9*32+30) /* AVX-512 BW (Byte/Word granular) Instructions */
  #define X86_FEATURE_AVX512VL	( 9*32+31) /* AVX-512 VL (128/256 Vector Length) Extensions */

Please holler if you disagree!

Thanks,

	Ingo