From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Lyude <cpaul@redhat.com>, Daniel Vetter <daniel.vetter@intel.com>,
intel-gfx@lists.freedesktop.org, arthur.j.runyan@intel.com,
open list <linux-kernel@vger.kernel.org>,
dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 2/2] drm/i915: Get rid of intel_dp_dpcd_read_wake()
Date: Mon, 21 Mar 2016 15:38:31 +0200 [thread overview]
Message-ID: <20160321133831.GX4329@intel.com> (raw)
In-Reply-To: <87lh5ct95t.fsf@intel.com>
On Mon, Mar 21, 2016 at 12:30:54PM +0200, Jani Nikula wrote:
> On Fri, 18 Mar 2016, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> > On Fri, Mar 18, 2016 at 06:12:35PM +0200, Ville Syrjälä wrote:
> >> On Fri, Mar 18, 2016 at 04:13:45PM +0200, Ville Syrjälä wrote:
> >> > On Thu, Mar 17, 2016 at 11:40:45AM -0400, Lyude wrote:
> >> > > - drm_dp_dpcd_read(aux, DP_DPCD_REV, buffer, 1);
> >> >
> >> > NAK
> >> >
> >> > If people keep intentionally breaking my shit I'm going to become
> >> > really grumpy soon.
> >>
> >> Oh, and just in case someone wants to come up with a better kludge,
> >> I just spent a few minutes analyzing the behavior of this crappy
> >> monitor a.
> >>
> >> What happens is that when the monitor is fully powered up (LED is blue)
> >> things are fine. After the monitor goes to sleep (LED turns orange)
> >> the first DPCD read will produce garbage. Further DPCD reads are fine,
> >> even if I wait a significant amount of time between the reads, as long
> >> as the monitor didn't do a power on->off cycle in between. So it looks
> >> like it's always just the first read after power down that gets
> >> corrupted.
> >>
> >> Now I think I'll go and test how writes behave, assuming I can find a
> >> decently sized chunk of DPCD address space I can write. And maybe I
> >> should also try i2c-over-aux...
> >
> > The first DPCD write after powerdown also got corrupted. But i2c-over-aux
> > seems unaffected for whatever reason.
>
> Did the display go to sleep on its own, or did we do something? In
> particular, does DPCD DP_SET_POWER register play a role? What if we skip
> writing D3 to it? What if we do that write as the first thing (every
> time)?
User pressing any of the buttons on the monitor is enough to wake it,
and after a short timeout it will power down on its own, leading to
the corrupted access.
Keeping DP_SET_POWER at D0 doesn't change anything.
--
Ville Syrjälä
Intel OTC
next prev parent reply other threads:[~2016-03-21 13:38 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-17 15:40 [PATCH 1/2] drm/dp_helper: retry on -ETIMEDOUT in drm_dp_dpcd_access() Lyude
2016-03-17 15:40 ` [PATCH 2/2] drm/i915: Get rid of intel_dp_dpcd_read_wake() Lyude
2016-03-17 17:56 ` Jani Nikula
2016-03-18 15:57 ` [Intel-gfx] " Daniel Vetter
2016-03-18 14:13 ` Ville Syrjälä
2016-03-18 16:12 ` Ville Syrjälä
2016-03-18 16:41 ` Ville Syrjälä
2016-03-18 18:00 ` Daniel Vetter
2016-03-18 18:05 ` Ville Syrjälä
2016-03-21 16:37 ` Lyude Paul
2016-03-21 10:30 ` Jani Nikula
2016-03-21 13:38 ` Ville Syrjälä [this message]
2016-03-23 19:30 ` [PATCH v3 1/2] drm/dp_helper: add workarounds from intel_dp_dpcd_read_wake() Lyude
2016-03-23 19:33 ` [PATCH v3 1/2 RESEND] " Lyude
2016-03-24 9:37 ` Jani Nikula
2016-03-24 18:27 ` [PATCH v4 0/5] Move workarounds from intel_dp_dpcd_read_wake() into drm's DP helpers Lyude
2016-03-24 18:27 ` [PATCH v4 1/5] drm/dp_helper: Increase retry interval to 1000us Lyude
2016-03-24 18:27 ` [PATCH v4 2/5] drm/dp_helper: Always wait before retrying native aux transactions Lyude
2016-03-24 18:27 ` [PATCH v4 3/5] drm/dp_helper: Retry aux transactions on all errors Lyude
2016-03-24 18:27 ` [PATCH v4 4/5] drm/dp_helper: Perform throw-away read before actual read in drm_dp_dpcd_read() Lyude
2016-03-24 18:27 ` [PATCH v4 5/5] drm/i915: Get rid of intel_dp_dpcd_read_wake() Lyude
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